Editing Processor design

{{short description|Task of creating a processor}}
'''Processor design''' is a subfield of [[computer science]] and [[computer engineering]] (fabrication) that deals with creating a [[processor (computing)|processor]], a key component of [[computer hardware]].

The design process involves choosing an [[instruction set]] and a certain execution paradigm (e.g. [[Very long instruction word|VLIW]] or [[Reduced instruction set computing|RISC]]) and results in a [[microarchitecture]], which might be described in e.g. [[VHDL]] or [[Verilog]]. For [[microprocessor]] design, this description is then manufactured employing some of the various [[semiconductor device fabrication]] processes, resulting in a [[Die (integrated circuit)|die]] which is bonded onto a [[chip carrier]]. This chip carrier is then soldered onto, or inserted into a [[CPU socket|socket]] on, a [[printed circuit board]] (PCB).

The mode of operation of any processor is the execution of lists of instructions. Instructions typically include those to compute or manipulate data values using [[Processor register|registers]], change or retrieve values in read/write memory, perform relational tests between data values and to control program flow.

Processor designs are often tested and validated on one or several FPGAs before sending the design of the processor to a foundry for [[semiconductor fabrication]].<ref>{{cite web|url=https://www.anandtech.com/show/14798/xilinx-announces-world-largest-fpga-virtex-ultrascale-vu19p-with-9m-cells|title=Xilinx Announces World Largest FPGA: Virtex Ultrascale+ VU19P with 9m Cells|first=Ian|last=Cutress|date=August 27, 2019|website=[[AnandTech]]}}</ref>

== Details ==
{{Prose|section|date=May 2011}}

=== Basics ===
CPU design is divided into multiple components. Information is transferred through [[datapath]]s (such as [[Arithmetic logic unit|ALUs]] and [[Pipeline (computing)|pipelines]]). These datapaths are controlled through logic by [[control unit]]s. [[Memory (computing)|Memory]] components include [[register file]]s and [[Cache (computing)|caches]] to retain information, or certain actions. [[Clock signal|Clock circuitry]] maintains internal rhythms and timing through clock drivers, [[Phase-locked loop|PLLs]], and [[clock distribution network]]s. Pad transceiver circuitry which allows signals to be received and sent and a [[logic gate]] cell [[Library (electronics)|library]] which is used to implement the logic. Logic gates are the foundation for processor design as they are used to implement most of the processor's components.<ref>{{cite book | url=https://books.google.com/books?id=GBVADQAAQBAJ&q=processor+logic+gates | title=Digital Systems: From Logic Gates to Processors | isbn=978-3-319-41198-9 | last1=Deschamps | first1=Jean-Pierre | last2=Valderrama | first2=Elena | last3=Terés | first3=Lluís | date=12 October 2016 | publisher=Springer }}</ref>

CPUs designed for high-performance markets might require custom (optimized or application specific (see below)) designs for each of these items to achieve frequency, [[power consumption|power-dissipation]], and chip-area goals whereas CPUs designed for lower performance markets might lessen the implementation burden by acquiring some of these items by purchasing them as [[intellectual property]]. Control logic implementation techniques ([[logic synthesis]] using CAD tools) can be used to implement datapaths, register files, and clocks. Common logic styles used in CPU design include unstructured random logic, [[finite-state machine]]s, [[microprogramming]] (common from 1965 to 1985), and [[Programmable logic array]]s (common in the 1980s, no longer common).

=== Implementation logic ===
Device types used to implement the logic include:
* Individual [[vacuum tube]]s, individual [[transistor]]s and semiconductor [[diode]]s, and [[transistor-transistor logic]] [[small-scale integration]] logic chips – no longer used for CPUs
* [[Programmable array logic]] and [[programmable logic device]]s – no longer used for CPUs
* [[Emitter-coupled logic]] (ECL) [[gate array]]s – no longer common
* [[CMOS]] [[gate array]]s – no longer used for CPUs
* [[CMOS]] [[Integrated circuit|mass-produced IC]]s – the vast majority of CPUs by volume
* [[CMOS]] [[Application-specific integrated circuit|ASIC]]s – only for a minority of special applications due to expense
* [[Field-programmable gate array]]s (FPGA) – common for [[soft microprocessor]]s, and more or less required for [[reconfigurable computing]]

A CPU design project generally has these major tasks:
* Programmer-visible [[instruction set architecture]], which can be implemented by a variety of [[microarchitecture]]s
* Architectural study and performance modeling in [[ANSI C]]/[[C++]] or [[SystemC]]{{clarify|date=January 2013}}
* [[High-level synthesis]] (HLS) or [[register transfer level]] (RTL, e.g. logic) implementation
* [[Register transfer language|RTL]] verification
* [[Circuit design]] of speed critical components (caches, registers, ALUs)
* [[Logic synthesis]] or logic-gate-level design
* [[Static timing analysis|Timing analysis]] to confirm that all logic and circuits will run at the specified operating frequency
* Physical design including [[Floorplan (microelectronics)#Floorplanning|floorplanning]], [[place and route]] of logic gates
* Checking that RTL, gate-level, transistor-level and physical-level representations are equivalent
* Checks for [[signal integrity]], [[design rule checking|chip manufacturability]]

Re-designing a CPU core to a smaller die area helps to shrink everything (a "[[photomask]] shrink"), resulting in the same number of transistors on a smaller die. It improves performance (smaller transistors switch faster), reduces power (smaller wires have less [[parasitic capacitance]]) and reduces cost (more CPUs fit on the same wafer of silicon). Releasing a CPU on the same size die, but with a smaller CPU core, keeps the cost about the same but allows higher levels of integration within one [[very-large-scale integration]] chip (additional cache, multiple CPUs or other components), improving performance and reducing overall system cost.

As with most complex electronic designs, the [[functional verification|logic verification]] effort (proving that the design does not have bugs) now dominates the project schedule of a CPU.

Key CPU architectural innovations include [[index register]], [[CPU cache|cache]], [[virtual memory]], [[instruction pipelining]], [[superscalar]], [[Complex instruction set computer|CISC]], [[Reduced instruction set computer|RISC]], [[virtual machine]], [[emulator]]s, [[microprogram]], and [[Stack (data structure)|stack]].

=== Microarchitectural concepts ===
{{Main|Microarchitecture}}

=== Research topics ===
<!-- [[virtual memory]] moved to [[Computer architecture]] -->
{{Main|History of general-purpose CPUs#1990 to today: Looking forward}}

A variety of [[History of general-purpose CPUs#1990 to today: Looking forward|new CPU design ideas]] have been proposed,
including [[reconfigurable logic]], [[clockless CPU]]s, [[computational RAM]], and [[optical computing]].

===Performance analysis and benchmarking===
{{Main| Computer performance}}
[[benchmark (computing)|Benchmarking]] is a way of testing CPU speed. Examples include SPECint and [[SPECfp]], developed by [[Standard Performance Evaluation Corporation]], and ConsumerMark developed by the Embedded Microprocessor Benchmark Consortium [[EEMBC]].

Some of the commonly used metrics include:
* [[Instructions per second]] - Most consumers pick a computer architecture (normally [[Intel]] [[IA32]] architecture) to be able to run a large base of pre-existing pre-compiled software.  Being relatively uninformed on computer benchmarks,  some of them pick a particular CPU based on operating frequency (see [[Megahertz Myth]]).
* [[FLOPS]] - The number of floating point operations per second is often important in selecting computers for scientific computations.
* [[Performance per watt]] - System designers building [[parallel computing|parallel computers]], such as [[Google search technology#Current hardware|Google]], pick CPUs based on their speed per watt of power, because the cost of powering the CPU outweighs the cost of the CPU itself.<ref>{{cite web|url=http://www.eembc.org/benchmark/consumer.asp?HTYPE=SIM|title=EEMBC ConsumerMark|archive-url=https://web.archive.org/web/20050327005323/http://www.eembc.org/benchmark/consumer.asp?HTYPE=SIM |archive-date=March 27, 2005}}</ref><ref>{{cite web|url=https://www.zdnet.com/article/power-could-cost-more-than-servers-google-warns/|title=Power could cost more than servers, Google warns|author=Stephen Shankland|website=[[ZDNet]]|date=December 9, 2005}}</ref>
* Some system designers building parallel computers pick CPUs based on the speed per dollar.
* System designers building [[real-time computing]] systems want to guarantee worst-case response. That is easier to do when the CPU has low [[interrupt latency]] and when it has deterministic response. ([[Digital signal processor|DSP]])
* Computer programmers who program directly in assembly language want a CPU to support a full featured [[instruction set]].
* Low power - For systems with limited power sources (e.g. solar, batteries, human power).
* Small size or low weight - for portable embedded systems, systems for spacecraft.
* Environmental impact - Minimizing environmental impact of computers during manufacturing and recycling as well during use.  Reducing waste, reducing hazardous materials.  (see [[Green computing]]).  <!-- ... Are there other measures of "goodness", "figures of merit", that I'm missing here? -->

There may be tradeoffs in optimizing some of these metrics.  In particular, many design techniques that make a CPU run faster make the "performance per watt", "performance per dollar", and "deterministic response" much worse, and vice versa.

==Markets==
{{Update section|date=December 2023|reason=No update since 2010, the market has significantly evolved since then}}
There are several different markets in which CPUs are used. Since each of these markets differ in their requirements for CPUs, the devices designed for one market are in most cases inappropriate for the other markets.

===General-purpose computing===
{{As of|2010}}, in the general-purpose computing market, that is, desktop, laptop, and server computers commonly used in businesses and homes, the Intel [[IA-32]] and the 64-bit version [[x86-64]] architecture dominate the market, with its rivals [[PowerPC]] and [[SPARC]] maintaining much smaller customer bases. Yearly, hundreds of millions of IA-32 architecture CPUs are used by this market.  A growing percentage of these processors are for mobile implementations such as netbooks and laptops.<ref>Kerr, Justin. [http://www.maximumpc.com/article/news/amd_loses_market_share_mobile_cpu_sales_outsell_desktop_first_time "AMD Loses Market Share as Mobile CPU Sales Outsell Desktop for the First Time."]  Maximum PC.  Published 2010-10-26.</ref>

Since these devices are used to run countless different types of programs, these CPU designs are not specifically targeted at one type of application or one function. The demands of being able to run a wide range of programs efficiently has made these CPU designs among the more advanced technically, along with some disadvantages of being relatively costly, and having high power consumption.

====High-end processor economics====
In 1984, most high-performance CPUs required four to five years to develop.<ref>
"New system manages hundreds of transactions per second" article
by Robert Horst and Sandra Metz, of Tandem Computers Inc.,
"Electronics" magazine, 1984 April 19:
"While most high-performance CPUs require four to five years to develop,
The [[NonStop (server computers)|NonStop]] TXP processor took just 2+1/2 years --
six months to develop a complete written specification,
one year to construct a working prototype,
and another year to reach volume production."
</ref>

===Scientific computing===
{{Main|Supercomputer}}
Scientific computing is a much smaller niche market (in revenue and units shipped).  It is used in government research labs and universities. Before 1990, CPU design was often done for this market, but mass market CPUs organized into large clusters have proven to be more affordable. The main remaining area of active hardware design and research for scientific computing is for high-speed data transmission systems to connect mass market CPUs.

===Embedded design===
{{Main|Embedded system}}
As measured by units shipped, most CPUs are embedded in other machinery, such as telephones, clocks, appliances, vehicles, and infrastructure. Embedded processors sell in the volume of many billions of units per year, however, mostly at much lower price points than that of the general purpose processors.

These single-function devices differ from the more familiar general-purpose CPUs in several ways:
* Low cost is of high importance.
* It is important to maintain a low power dissipation as embedded devices often have a limited battery life and it is often impractical to include cooling fans.
* To give lower system cost, peripherals are integrated with the processor on the same silicon chip.
* Keeping peripherals on-chip also reduces power consumption as external GPIO ports typically require buffering so that they can source or sink the relatively high current loads that are required to maintain a strong signal outside of the chip.
** Many embedded applications have a limited amount of physical space for circuitry; keeping peripherals on-chip will reduce the space required for the circuit board.
** The program and data memories are often integrated on the same chip. When the only allowed program memory is [[Read-only memory|ROM]], the device is known as a [[microcontroller]].
* For many embedded applications, interrupt latency will be more critical than in some general-purpose processors.

====Embedded processor economics====
The embedded CPU family with the largest number of total units shipped is the [[8051]], averaging nearly a billion units per year.<ref>{{cite web |url=http://people.wallawalla.edu/~curt.nelson/engr355/lecture/8051_overview.pdf |title=8051 Overview |author=Curtis A. Nelson |access-date=2011-07-10 |url-status=dead |archive-url=https://web.archive.org/web/20111009101426/http://people.wallawalla.edu/~curt.nelson/engr355/lecture/8051_overview.pdf |archive-date=2011-10-09 }}</ref>  The 8051 is widely used because it is very inexpensive.  The design time is now roughly zero, because it is widely available as commercial intellectual property.  It is now often embedded as a small part of a larger system on a chip.  The silicon cost of an 8051 is now as low as US$0.001, because some implementations use as few as 2,200 logic gates and take 0.4730 square millimeters of silicon.<ref>
{{cite web| url = http://www.keil.com/dd/docs/datashts/evatronix/t8051_ds.pdf| title = T8051 Tiny 8051-compatible Microcontroller| archive-url = https://web.archive.org/web/20110929033902/https://www.keil.com/dd/docs/datashts/evatronix/t8051_ds.pdf| archive-date = 2011-09-29}}</ref><ref>To figure dollars per square millimeter, see [http://www.overclockers.com/forums/showthread.php?t=550542], and note that an SOC component has no pin or packaging costs.</ref>

As of 2009, more CPUs are produced using the [[ARM architecture family]] instruction sets than any other 32-bit instruction set.<ref>
[http://www.extremetech.com/extreme/52180-arm-cores-climb-into-3g-territory "ARM Cores Climb Into 3G Territory"] by Mark Hachman, 2002.
</ref><ref>
[http://www.embedded.com/electronics-blogs/significant-bits/4024488/The-Two-Percent-Solution "The Two Percent Solution"] by Jim Turley 2002.
</ref>
The ARM architecture and the first ARM chip were designed in about one and a half years and 5 human years of work time.<ref>[https://web.archive.org/web/20090606152116/http://atterer.net/acorn/arm.html "ARM's way"] 1998</ref>

The 32-bit [[Parallax Propeller]] microcontroller architecture and the first chip were designed by two people in about 10 human years of work time.<ref>{{Cite web
| first=Chip | last=Gracey
| title = Why the Propeller Works
| url = http://www.parallax.com/Portals/0/Downloads/docs/article/WhythePropellerWorks.pdf
| archive-url = https://web.archive.org/web/20090419060820/http://www.parallax.com/Portals/0/Downloads/docs/article/WhythePropellerWorks.pdf
| archive-date = 2009-04-19
}}</ref>

The 8-bit [[Atmel AVR|AVR architecture]] and first AVR microcontroller was conceived and designed by two students at the Norwegian Institute of Technology.

The 8-bit 6502 architecture and the first [[MOS Technology 6502]] chip were designed in 13 months by a group of about 9 people.<ref>{{Cite web |url=http://silicongenesis.stanford.edu/transcripts/mensch.htm |title=Interview with William Mensch |access-date=2009-02-01 |archive-url=https://web.archive.org/web/20160304091031/http://silicongenesis.stanford.edu/transcripts/mensch.htm |archive-date=2016-03-04 |url-status=dead }}</ref>

====Research and educational CPU design====
The 32-bit [[Berkeley RISC]] I and RISC II processors were mostly designed by a series of students as part of a four quarter sequence of graduate courses.<ref>{{cite web|url=http://www.eecs.berkeley.edu/Pubs/TechRpts/1982/CSD-82-106.pdf |archive-url=https://web.archive.org/web/20060305132258/http://www.eecs.berkeley.edu/Pubs/TechRpts/1982/CSD-82-106.pdf |archive-date=2006-03-05 |url-status=live|title=Design and Implementation of RISC I|author1=C.H. Séquin|author-link1=Carlo H. Sequin|author2=D.A. Patterson|author-link2=David A. Patterson (scientist)}}</ref>
This design became the basis of the commercial [[SPARC]] processor design.

For about a decade, every student taking the 6.004 class at MIT was part of a team—each team had one semester to design and build a simple 8 bit CPU out of [[7400 series]] [[integrated circuit]]s.
One team of 4 students designed and built a simple 32 bit CPU during that semester.<ref>{{cite web|url=http://sub-zero.mit.edu/fbyte/hacks/vhs/|title=the VHS|archive-url=https://web.archive.org/web/20100227055013/http://sub-zero.mit.edu/fbyte/hacks/vhs/|archive-date=2010-02-27}}
</ref>

Some undergraduate courses require a team of 2 to 5 students to design, implement, and test a simple CPU in a FPGA in a single 15-week semester.<ref>{{cite web|url=http://www.fpgacpu.org/teaching.html|title=Teaching Computer Design with FPGAs|author=Jan Gray}}</ref>

The MultiTitan CPU was designed with 2.5 man years of effort, which was considered "relatively little design effort" at the time.<ref>{{cite journal |last1=Jouppi |first1=N.P. |last2=Tang |first2=J.Y.-F. |title=A 20-MIPS sustained 32-bit CMOS microprocessor with high ratio of sustained to peak performance |journal=IEEE Journal of Solid-State Circuits |date=October 1989 |volume=24 |issue=5 |pages=1348–1359 |doi=10.1109/JSSC.1989.572612 |bibcode=1989IJSSC..24.1348J }}</ref>
24 people contributed to the 3.5 year MultiTitan research project, which included designing and building a prototype CPU.<ref>{{cite web|url=http://www.hpl.hp.com/techreports/Compaq-DEC/WRL-87-8.pdf |archive-url=https://web.archive.org/web/20040825183403/http://www.hpl.hp.com/techreports/Compaq-DEC/WRL-87-8.pdf |archive-date=2004-08-25 |url-status=live|title=MultiTitan: Four Architecture Papers|year=1988|pages=4–5}}</ref>

==== Soft microprocessor cores ====
{{Main|Soft microprocessor}}
For embedded systems, the highest performance levels are often not needed or desired due to the power consumption requirements. This allows for the use of processors which can be totally implemented by [[logic synthesis]] techniques. These synthesized processors can be implemented in a much shorter amount of time, giving quicker [[time-to-market]].

== See also ==
{{Wikibooks|Microprocessor Design}}
* [[Amdahl's law]]
* [[Central processing unit]]
* [[Comparison of instruction set architectures]]
* [[Complex instruction set computer]]
* [[CPU cache]]
* [[Electronic design automation]]
* [[Heterogeneous computing]]
* [[High-level synthesis]]
* [[History of general-purpose CPUs]]
* [[Integrated circuit design]]
* [[Microarchitecture]]
* [[Microprocessor]]
* [[Minimal instruction set computer]]
* [[Moore's law]]
* [[Reduced instruction set computer]]
* [[System on a chip]]
* [[Network on a chip]]
* [[Process design kit]] – a set of documents created or accumulated for a semiconductor device production process
* [[Uncore]]

== References ==
{{Reflist}}

===General references===
*{{cite book | first=Enoch| last=Hwang| year=2006| title=Digital Logic and Microprocessor Design with VHDL| publisher=Thomson| isbn=0-534-46593-5| url=http://faculty.lasierra.edu/~ehwang/digitaldesign| author-link=Enoch Hwang}}
*[https://web.archive.org/web/20100113033730/http://www.gamezero.com/team-0/articles/math_magic/micro/index.html Processor Design: An Introduction]

{{CPU technologies}}
{{Design}}

{{DEFAULTSORT:Processor Design}}
[[Category:Central processing unit]]
[[Category:Computer engineering]]
[[Category:Design engineering]]