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Sample and hold
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{{Short description|Type of voltage sampling device}} {{About|the type of electronic circuit}} [[File:Sample-hold-circuit.svg|thumb|200px|A simplified sample and hold circuit diagram. AI is an analog input, AO β an analog output, C β a control signal.]] [[File:Sampled.signal.svg|thumb|200px|Sample times.]] [[File:Zeroorderhold.signal.svg|thumb|200px|Sample and hold.]] [[File:Tesla MAC198.jpg|thumb|200px| A sample-and-hold integrated circuit ([[Tesla (Czechoslovak company)|Tesla]] MAC198)]] In [[electronics]], a '''sample and hold''' (also known as sample and follow) circuit is an [[analog circuit|analog device]] that samples (captures, takes) the [[voltage]] of a continuously varying [[analog signal]] and holds (locks, freezes) its value at a constant level for a specified minimum period of time. Sample and hold circuits and related [[Precision rectifier#Peak detector|peak detectors]] are the elementary analog [[memory]] devices. They are typically used in [[analog-to-digital converter]]s to eliminate variations in input signal that can corrupt the conversion process.<ref name=K37>Kefauver and Patschke, p. 37.</ref> They are also used in electronic music, for instance to impart a random quality to successively-played notes. A typical sample and hold circuit stores [[electric charge]] in a [[capacitor]] and contains at least one switching device such as a [[Field-effect transistor|FET (field effect transistor) switch]] and normally one [[operational amplifier]].<ref name=HH220>Horowitz and Hill, p. 220.</ref> To sample the input signal, the switch connects the capacitor to the output of a [[buffer amplifier]]. The buffer amplifier charges or discharges the capacitor so that the voltage across the capacitor is practically equal, or proportional to, input voltage. In hold mode, the switch disconnects the capacitor from the buffer. The capacitor is invariably discharged by its own [[Leakage (electronics)|leakage currents]] and useful load currents, which makes the circuit inherently [[volatile memory|volatile]], but the loss of voltage (''voltage drop'') within a specified [[Flip-flop (electronics)#Timing considerations|hold time]] remains within an acceptable error margin for all but the most demanding applications. ==Purpose== Sample and hold circuits are used in linear systems. In some kinds of [[analog-to-digital converter|analog-to-digital converters]] (ADCs), the input is compared to a voltage generated internally from a [[digital-to-analog converter]] (DAC). The circuit tries a series of values and stops converting once the voltages are equal, within some defined error margin. If the input value was permitted to change during this comparison process, the resulting conversion would be inaccurate and possibly unrelated to the true input value. Such [[successive approximation converter]]s will often incorporate internal sample and hold circuitry. In addition, sample and hold circuits are often used when multiple samples need to be measured at the same time. Each value is sampled and held, using a common sample clock. For practically all commercial '''[[liquid crystal]] [[active matrix]] displays''' based on TN, IPS or VA electro-optic LC cells (excluding bi-stable phenomena), each [[pixel]] represents a small capacitor, which has to be periodically charged to a level corresponding to the [[greyscale]] value (contrast) desired for a picture element. In order to maintain the level during a scanning cycle (frame period), an additional electric capacitor is attached in parallel to each LC pixel to better hold the voltage. A [[thin-film transistor|thin-film FET switch]] is addressed to select a particular LC pixel and charge the picture information for it. In contrast to an S/H in general electronics, there is no output operational amplifier and no electrical signal AO. Instead, the charge on the hold capacitors controls the deformation of the LC molecules and thereby the optical effect as its output. The invention of this concept and its implementation in thin-film technology have been honored with the [[IEEE Jun-ichi Nishizawa Medal]].<ref>{{Cite journal|last=Kawamoto|first=Hiro|date=2012|title=The Inventors of TFT Active-Matrix LCD Receive the 2011 IEEE Nishizawa Medal|url=https://ieeexplore.ieee.org/document/6104244/authors|journal=Journal of Display Technology|volume=8|issue=1|pages=3β4|doi=10.1109/JDT.2011.2177740|bibcode=2012JDisT...8....3K |issn=1558-9323|url-access=subscription}}</ref> [[File:Sample and Hold DSCF0028.jpg|thumb|right|200px|The sample and hold stencil on a [[ARP_Odyssey#Korg_ARP_Odyssey|Korg ARP Odyssey]] synthesizer.]] During a scanning cycle, the picture doesn't follow the input signal. This does not allow the eye to refresh and can lead to blurring during motion sequences, also the transition is visible between frames because the backlight is constantly illuminated, adding to [[display motion blur]].<ref>[http://www.poynton.com/PDFs/Motion_portrayal.pdf Charles Poynton is an authority on artifacts related to HDTV, and discusses motion artifacts succinctly and specifically]</ref><ref>[https://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5583881&tag=1 Eye-tracking based motion blur on LCD]</ref> Sample and hold circuits are also frequently found on [[synthesizer|synthesizers]], either as a [[modular synthesizer|discrete module]] or as an integral component. They are used to take periodic samples of an incoming signal, typically as a source of modulation for other components of the synthesizer. When a sample and hold circuit is plugged into a [[white noise]] generator the result is a sequence of random values, which - depending on the amplitude of modulation - can be used to provide subtle variations in a signal or wildly varying random tones.<ref>[https://www.soundonsound.com/techniques/sample-hold-sample-rate-converters-1 Sound on Sound, August 2000: From Sample & Hold To Sample-rate Converters]</ref> ==Implementation== To keep the input voltage as stable as possible, it is essential that the capacitor have very low [[leakage (electronics)|leakage]], and that it not be loaded to any significant degree which calls for a very high [[input impedance]]. ==See also== *[[Analog signal to discrete time interval converter]] ==Notes== {{reflist}} ==References== * Paul Horowitz, Winfield Hill (2001 ed.). ''[https://books.google.com/books?id=bkOMDgwFA28C&dq=sample+and+hold&pg=PA220 The Art of Electronics]''. Cambridge University Press. {{ISBN|0-521-37095-7}}. * Alan P. Kefauver, David Patschke (2007). ''[https://books.google.com/books?id=UpzqCrj7QxYC&dq=sample+and+hold&pg=PA60 Fundamentals of digital audio]''. A-R Editions, Inc. {{ISBN|0-89579-611-2}}. * Analog Devices 21 page Tutorial "Sample and Hold Amplifiers" http://www.analog.com/static/imported-files/tutorials/MT-090.pdf *{{cite book|last=Ndjountche|first=Tertulien|title=CMOS Analog Integrated Circuits: High-Speed and Power-Efficient Design|year=2011|publisher=CRC Press|location=Boca Raton, FL, USA|isbn=978-1-4398-5491-4|pages=925|url=http://www.crcpress.com/ecommerce_product/product_detail.jsf?isbn=0&catno=k12557}} *[https://www.renesas.com/us/en/www/doc/application-note/an517.pdf Applications of Monolithic Sample and hold Amplifiers-Intersil] [[Category:Electronic circuits]] [[Category:Digital signal processing]]
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