Editing Silicon on sapphire

{{About|the manufacturing process|the song "Silicone on Sapphire" by the Clash|Sandinista!}}

'''Silicon on sapphire''' ('''SOS''') is a [[Epitaxy|hetero-epitaxial]] process for [[metal–oxide–semiconductor]] (MOS) [[integrated circuit]] (IC) [[semiconductor device fabrication|manufacturing]] that consists of a thin layer (typically thinner than 0.6&nbsp;[[μm]]) of [[silicon]] grown on a [[sapphire]] ({{chem|Al|2|O|3}}) [[wafer (electronics)|wafer]]. SOS is part of the [[silicon-on-insulator]] (SOI) family of [[CMOS]] (complementary MOS) technologies.

Typically, high-purity artificially grown sapphire crystals are used. The silicon is usually deposited by the decomposition of [[silane]] gas ({{chem|SiH|4}}) on heated sapphire substrates. The advantage of sapphire is that it is an excellent [[Electrical insulation|electrical insulator]], preventing stray [[Current (electricity)|currents]] caused by radiation from spreading to nearby circuit elements. SOS faced early challenges in commercial manufacturing because of difficulties in fabricating the very small [[transistor]]s used in modern high-density applications.  This is because the SOS process results in the formation of dislocations, twinning and stacking faults from [[crystal lattice]] disparities between the sapphire and silicon. Additionally, there is some [[aluminum]], a p-type [[dopant]], contamination from the substrate in the silicon closest to the interface.

== History ==
In 1963, [[Harold M. Manasevit]] was the first to document epitaxial growth of silicon on sapphire while working at the [[Autonetics]] division of [[North American Aviation]] (now [[Boeing]]). In 1964, he published his findings with colleague William Simpson in the ''Journal of Applied Physics''.<ref name="Manasevit_1964"/> In 1965, C.W. Mueller and P.H. Robinson [[semiconductor device fabrication|fabricated]] a [[MOSFET]] (metal–oxide–semiconductor field-effect transistor) using the silicon-on-sapphire process at [[RCA Laboratories]].<ref>{{cite journal |last1=Mueller |first1=C. W. |last2=Robinson |first2=P. H. |title=Grown-film silicon transistors on sapphire |journal=[[Proceedings of the IEEE]] |date=December 1964 |volume=52 |issue=12 |pages=1487–90 |doi=10.1109/PROC.1964.3436}}</ref>

SOS was first used in [[aerospace]] and [[military]] applications because of its inherent [[radiation hardened|resistance to radiation]]. More recently, patented advancements in SOS processing and design have been made by [[Peregrine Semiconductor]], allowing SOS to be commercialized in high-volume for high-performance radio-frequency (RF) applications.

== Circuits and systems ==
[[Image:Patchdiesos.jpg|frame|right|A silicon on sapphire microchip designed by e-Lab<ref name="Yale_eLab"/>]]

The advantages of the SOS technology allow research groups to fabricate a variety of SOS circuits and systems that benefit from the technology and advance the state-of-the-art in:

* analog-to-digital converters (a nano-Watts prototype was produced by Yale e-Lab)<ref name="Yale_1a"/><ref name="Yale_1b"/>
* monolithic digital isolation buffers<ref name="Yale_2"/>
* SOS-CMOS image sensor arrays (one of the first standard CMOS image sensor arrays capable of transducing light simultaneously from both sides of the die was produced by Yale e-Lab)<ref name="Yale_3"/>
* patch-clamp amplifiers<ref name="Yale_4"/>
* energy harvesting devices<ref name="Yale_5"/>
* three-dimensional (3D) integration with no galvanic connections
* charge pumps<ref name="Yale_6"/>
* temperature sensors<ref name="Yale_5"/>
* early microprocessors, such as the [[RCA 1802]]

== Applications ==
Silicon on sapphire pressure transducer, pressure transmitter and temperature sensor diaphragms have been manufactured using a patented process by Armen Sahagen since 1985.<ref name="Sensonetics"/> Outstanding performance in high temperature environments helped propel this technology forward. This SOS technology has been licensed throughout the world. ESI Technology Ltd. in the UK have developed a wide range of pressure transducers and pressure transmitters that benefit from the outstanding features of silicon on sapphire.<ref name="ESI-Tec"/>

[[Peregrine Semiconductor]] has used SOS technology to develop [[RF circuit|RF integrated circuits]] (RFICs) including [[RF switch]]es, [[digital step attenuator]]s (DSAs), [[Phase-locked loop|phase locked-loop]] (PLL) frequency synthesizers, [[prescaler]]s, mixers/[[Heterodyne|upconverters]], and [[variable-gain amplifier]]s. These RFICs are designed for commercial RF applications such as mobile handsets and cellular infrastructure, broadband consumer and [[DTV radio|DTV]], test and measurement, and industrial public safety, as well as rad-hard [[aerospace]] and [[Defense industry|defense]] markets.

[[Hewlett-Packard]] used SOS in some of their [[CPU]] designs, particularly in the [[HP 3000]] line of computers.<ref>{{cite journal|url=https://www.hpl.hp.com/hpjournal/pdfs/IssuePDFs/1979-09.pdf|date=September 1979|volume=30|number=9|journal=Hewlett-Packard Journal|title=SOS Technology Yields Low-Cost HP 3000 Computer System |first=Richard C. |last=Edwards|access-date=2021-12-29 |pages=3–6}}</ref>

Silicon on sapphire chips produced in the 1970s proved superior in performance to their all silicon counterparts, but this came at the cost of lower yields of just 9%.<ref>{{cite web | url=https://www.tomshardware.com/pc-components/cpus/transparent-processor-found-in-vintage-hp-computer-silicon-on-sapphire-chip-discovered-on-a-humble-floppy-drive-pcb | title=Transparent processor found in vintage HP computer – exotic silicon-on-sapphire chip discovered on a humble floppy drive PCB | date=21 December 2023 }}</ref><ref>{{cite web | url=https://www.righto.com/2023/12/HP-silicon-on-sapphire-phi-chip.html?m=1&s=31 | title=The transparent chip inside a vintage Hewlett-Packard floppy drive }}</ref>

== Substrate analysis: SOS structure ==
The application of epitaxial growth of silicon on sapphire substrates for fabricating MOS devices involves a silicon purification process that mitigates crystal defects which result from a mismatch between sapphire and silicon lattices. For example, Peregrine Semiconductor's [[SP4T]] switch is formed on an SOS substrate where the final thickness of silicon is approximately 95&nbsp;nm. Silicon is recessed in regions outside the polysilicon gate stack by poly oxidation and further recessed by the sidewall spacer formation process to a thickness of approximately 78&nbsp;nm.{{Citation needed|date=March 2021}}

== See also ==
* [[Silicon on insulator]]
* [[Radiation hardening]]

== References ==
{{Reflist|refs=
<ref name="Manasevit_1964">{{cite journal |last1=Manasevit |first1=H. M. |last2=Simpson |first2=W. J. |title=Single-Crystal Silicon on a Sapphire Substrate |journal=[[Journal of Applied Physics]] |year=1964 |volume=35 |issue=4 |pages=1349–51 |doi=10.1063/1.1713618|bibcode=1964JAP....35.1349M }}</ref>
<ref name="Sensonetics">{{cite web| url = https://www.sensonetics.com |title = Silicon-on-Sapphire High Temperature Pressure Transducer Products}}</ref>
<ref name="ESI-Tec">{{cite web| url = http://www.esi-tec.com |title = Pressure Sensors, Strain Gauges, Telemetry Systems}}</ref>
<ref name="Yale_eLab">{{cite web |url=http://www.eng.yale.edu/elab/ |title=e-Lab |access-date=2006-11-12 |url-status=dead |archive-url=https://web.archive.org/web/20061107154041/http://www.eng.yale.edu/elab/ |archive-date=2006-11-07}}</ref>
<ref name="Yale_1a">{{cite journal |url=https://e-lab.github.io/data/papers/TCASIIadc06.pdf |title=An 8-bit 800-μW 1.23-MS/s Successive Approximation ADC in SOI CMOS |first1=Eugenio |last1=Culurciello |first2=Andreas G. |last2=Andreou |journal=[[IEEE Transactions on Circuits and Systems]] |volume=53 |issue=9 |date=September 2006 |pages=858–861 |doi=10.1109/TCSII.2006.880021 |s2cid=25906118 }}</ref>
<ref name="Yale_1b">{{cite journal |url=https://e-lab.github.io/data/papers/EL20062c1csadc.pdf |title=Nano-Watt silicon-on-sapphire ADC using 2C-1C capacitor chain |first1=Zhengming |last1=Fu |first2=Pujitha |last2=Weerakoon |first3=Eugenio |last3=Culurciello |journal= Electronics Letters|volume=42 |issue=6 |date=16 March 2006 |pages=341–3 |doi=10.1049/el:20060109|bibcode=2006ElL....42..341F }}</ref>
<ref name="Yale_2">{{cite conference |chapter=Digital phase-shift modulation for an isolation buffer in silicon-on-sapphire CMOS |last1=Culurciello |first1=E. |last2=Pouliquen |first2=P. |last3=Andreou |first3=A.G. |title=2006 IEEE International Symposium on Circuits and Systems |conference=[[IEEE International Symposium on Circuits and Systems]] 2006 |date=21–24 May 2006 |pages=3710–3713 |doi=10.1109/ISCAS.2006.1693433|isbn=0-7803-9389-9 |citeseerx=10.1.1.84.376 }}</ref>
<ref name="Yale_3">{{cite journal |url=https://e-lab.github.io/data/papers/EL2004_SOSDPS.pdf |title=16×16 pixel silicon on sapphire CMOS digital pixel photosensor array|last1=Culurciello |first1=E. |last2=Andreou |first2=A. G. |journal= Electronics Letters|volume=40 |issue=1 |pages=66–68 |date=January 8, 2004 |doi=10.1049/el:20040055|bibcode= 2004ElL....40...66C}}</ref>
<ref name="Yale_4">{{cite conference |chapter-url=https://ieeexplore.ieee.org/document/1693519 |chapter=An Integrated Patch-Clamp Amplifier in Silicon-on-Sapphire CMOS |first1=F. |last1=Laiwalla |first2=K.G. |last2=Klemic |first3=F.J. |last3=Sigworth |first4=E. |last4=Culurciello |title=2006 IEEE International Symposium on Circuits and Systems |conference=[[IEEE International Symposium on Circuits and Systems]] 2006 |date=21–24 May 2006 |pages=4054–7 |doi=10.1109/ISCAS.2006.1693519|isbn=0-7803-9389-9 }}</ref>
<ref name="Yale_5">{{cite journal |url=https://e-lab.github.io/data/papers/EL2006harvest.pdf |title=A Low-Voltage Temperature Sensor for Micro Power Harvesters in Silicon-on-Sapphire CMOS |first1=T. |last1=Kaya |first2=H. |last2=Koser |first3=E. |last3=Culurciello |journal= Electronics Letters|volume=42 |issue=9 |date=27 April 2006 |pages=526–8 |doi=10.1049/el:20060867|bibcode=2006ElL....42..526K }}</ref>
<ref name="Yale_6">{{cite journal |url=https://e-lab.github.io/data/papers/el2005_isolationcp.pdf |title=Isolation charge pump fabricated in silicon on sapphire CMOS technology |first1=Eugenio |last1=Culurciello |first2=Philippe O. |last2=Pouliquen  |first3=Andreas G. |last3=Andreou |journal= Electronics Letters|volume=41 |issue=10 |date=24 January 2005 |pages=520–592 |doi=10.1049/el:20050312|bibcode=2005ElL....41..590C }}</ref>
}}

== Further reading ==
*{{cite book |title=Silicon-on-Sapphire Circuits and Systems, Sensor and Biosensor interfaces |author-first=Eugenio |author-last=Culurciello |publisher=[[McGraw Hill]] |date=2009 |url={{GBurl|jeKxNMFb-MAC|pg=PR7}} |isbn=978-0-07-160849-7 |oclc=459797166}}
* {{cite web |author-first=Ken |author-last=Shirriff |title=The transparent chip inside a vintage Hewlett-Packard floppy drive |date=December 2023 |url=http://www.righto.com/2023/12/HP-silicon-on-sapphire-phi-chip.html |access-date=2023-02-04 |url-status=live |archive-url=https://web.archive.org/web/20240204141535/https://www.righto.com/2023/12/HP-silicon-on-sapphire-phi-chip.html |archive-date=2024-02-04}}

[[Category:Thin film deposition]]
[[Category:Semiconductor device fabrication]]
[[Category:MOSFETs]]
[[Category:Silicon]]