Editing VIA C7

{{Short description|Central processing unit designed by Centaur Technology and sold by VIA Technologies}}{{Infobox CPU
| name           = C7
| image          = KL_VIA_C7_M.jpg
| caption        = C7-M 795 2.0 GHz
| produced-start = May 2005
| slowest        = 1.0   | slow-unit      = GHz
| fastest        = 2.0   | fast-unit      = GHz
| fsb-slowest    = 400   | fsb-slow-unit  = MT/s
| fsb-fastest    = 800   | fsb-fast-unit  = MT/s
| l1cache        = 64 KiB instruction + 64 KiB data
| l2cache        = 128 KiB 32-way exclusive
| size-from      = 90nm
| manuf1         = VIA Technologies
| numcores       = 1
| core1          = Esther (C5J)
| sock1          = [[Socket 479]]
| sock2          = nanoBGA2 400
| arch           = [[x86-16]], [[IA-32]]
| extensions     = [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[VIA_PadLock|PadLock]] (AES, RNG, SHA, PMM)
| predecessor    = [[VIA C3]]
| successor      = [[VIA Nano]]
}}

The '''VIA C7''' is an [[x86]] [[central processing unit]] designed by [[Centaur Technology]] and sold by [[VIA Technologies]].

== Product history ==
The C7 delivers a number of improvements to the older [[VIA C3]] cores but is nearly identical to the latest VIA C3 Nehemiah core. The C7 was officially launched in May 2005, although according to market reports, full volume production was not in place at that date. In May 2006 Intel's [[cross-licensing]] agreement with VIA expired and was not renewed, which was the reason for the forced termination of C3 shipments on March 31, 2006, as VIA lost rights to the [[Socket 370]].

[[File:Top EPIA PX10000G Motherboard new.jpg|thumb|EPIA PX10000G Pico-ITX Motherboard]]
A 1&nbsp;GHz C7 processor with 128kB of cache memory is used in VIA's own PX10000G [[motherboard]] which is based on the proprietary [[Pico-ITX]] form factor. The chip is cooled by a large heatsink that covers most of the board and a small 40mm fan.

In early April 2008 the schoolroom-use oriented, ultra-portable [[HP 2133 Mini-Note PC]] family debuted with an entirely VIA-based, 1.0, 1.2 and 1.6&nbsp;GHz C7-M processor portfolio, where the lowest speed model is optimized for running an [[Solid State Drive|SSD]]-based 4GB [[Linux]] distribution with a sub $500 price tag, while the middle tier carries [[Windows XP]] and the top model comes with [[Windows Vista]] Business, factory default. HP chose the single-core VIA C7-M CPU in order to meet the already fixed $499 starting price, even though Intel's competing Atom processor line debuted on 2 April 2008.

[[File:VIA C7-M Mobile Processor Logo.jpg|thumb|VIA C7-M Mobile Processor Logo]]
The C7 is sold in five main versions:
* '''C7''': for desktops / laptops (1.5-2.0&nbsp;GHz) - FCPGA Pentium-M package, 400, 533, 800&nbsp;MHz FSB
* '''C7-M''': for mobiles / embedded (1.5-2.0&nbsp;GHz) - Nano[[Ball grid array|BGA]]2, 21mm × 21mm, 400, 800&nbsp;MHz FSB
* '''C7-M Ultra Low Voltage''': for mobiles / embedded (1.0-1.6&nbsp;GHz) - NanoBGA2, 21mm × 21mm, 400, 800&nbsp;MHz FSB
* '''C7-D''': similar to original C7, but [[RoHS]]-compliant<ref>{{Cite web |date=2007-11-21 |title=FAQ on Green Computing & ROHS - VIA Technologies, Inc. |url=http://www.via.com.tw/en/initiatives/greencomputing/greenfaq.jsp |archive-url=https://web.archive.org/web/20071121185107/http://www.via.com.tw/en/initiatives/greencomputing/greenfaq.jsp |archive-date=2007-11-21 |access-date=2024-08-04 |website=VIA Connect}}</ref> and marketed as "carbon-free processor". Some variants do not support [[PowerSaver]]{{Citation needed|date=November 2007}}
* '''Eden''': Some [[VIA Eden]] CPUs are based on a C7 core with low power consumption, package size, and clock rates as low as 400&nbsp;MHz.

== CPU cores ==

=== Esther ===
The '''Esther''' (C5J) is the next evolution step of the Nehemiah+ (C5P) core of the [[VIA C3]] line-up.

New Features of this core include:
* Average power consumption of less than 1 watt.
* 2&nbsp;GHz operation and a [[Thermal Design Power|TDP]] of 20 watts.
* L2 cache increased from 64k to 128k, with associativity increased from 16-way set associative in C3 to 32-way set associative in C7.
* VIA has stated<ref>{{cite web | author = Shilov, Anton | title = VIA Denies Intel Pentium M Bus Licensing | publisher = X-bit labs | url = http://www.xbitlabs.com/news/mobile/display/20050518045045.html | access-date = 2007-04-23 | url-status = dead | archive-url = https://web.archive.org/web/20070513120849/http://www.xbitlabs.com/news/mobile/display/20050518045045.html | archive-date = 2007-05-13 }}</ref> the C7 bus is physically based upon the Pentium-M 479-pin packaging, but uses the proprietary VIA V4 bus for electrical signalling, instead of Intel’s AGTL+ Quad Pumped Bus, avoiding legal infringement.
* "Twin Turbo" technology, which consists of dual [[Phase-locked loop|PLLs]], one set at a high clock speed, and the other set at a lower speed. This allows the processor's clock frequency to be adjusted in a single processor cycle. Lower switching latency means that more aggressive regulation can be employed.
* Support for [[SSE2]] and [[SSE3]] extended instructions.
* [[NX bit]] in [[Physical Address Extension|PAE]] mode that prevents [[buffer overflow]] software bugs from being exploitable by viruses or attackers.
* Hardware support for [[SHA-1]] and [[SHA-256]] hashing.
* Hardware based "[[Montgomery reduction|Montgomery multiplier]]" supporting key sizes up to 32K for [[public-key cryptography]].

==Design choices==
* C7 Esther as an evolutionary step after C3 Nehemiah, in which VIA / Centaur followed their traditional approach of balancing performance against a constrained transistor / power budget.
* The cornerstone of the C3 series chips' design philosophy has been that even a relatively simple in-order scalar core can offer reasonable performance against a complex superscalar out-of-order core if supported by an efficient "front-end", i.e. prefetch, cache and [[branch prediction]] mechanisms.
* In the case of C7, the design team have focused on further streamlining the (front-end) of the chip, i.e. cache size, associativity and throughput as well as the prefetch system.<ref>{{cite web | title = Detailed Platform Analysis in RightMark Memory Analyzer. Part 12: VIA C7/C7-M Processors| publisher = Pricenfees.com| url =https://www.pricenfees.com/digit-life-archives/via-cyrix-iii-samuel-2-600-667-mhz | access-date = 2007-03-12}}</ref>  At the same time no significant changes to the execution core (back-end) of the chip.
* The C7 successfully further closes the gap in performance with AMD / Intel chips, since clock speed is not thermally constrained.{{Citation needed|date=January 2009}}

== See also ==
* [[List of VIA C7 microprocessors]]
* [[List of VIA Eden microprocessors]]
* [[List of VIA microprocessors]]
* [[Intel Atom]]
* [[Netbook]]

== References ==
{{Reflist}}

== Further reading ==
{{refbegin}}
* {{cite web|url=http://www.cs.utexas.edu/users/cart/arch/spring06/henry_slides.ppt|title=Random Stuff|author2=Centaur Technology|author2-link=Centaur Technology|first1=G Glenn|last1=Henry|author-link1=Glenn Henry (IT entrepreneur)|date=30 January 2006|first3=Gem|last3=Naivar|publisher=[[University of Texas at Austin]]|work=How to make a highly secure x86 processor|series=UT-Austin Computer Architecture Seminar Series}}
{{refend}}

== External links ==
* {{cite web |last=Smith |first=Van |title=An inside look at the VIA C7-M |website=VIA Arena |date=2006-03-10 |url= http://www.viaarena.com/an-inside-look-at-the-via-c7-m.aspx?ID=126&MCatID=1&P=1 |archive-url= https://web.archive.org/web/20140221210919/http://www.viaarena.com/an-inside-look-at-the-via-c7-m.aspx?ID=126&MCatID=1&P=1 |archive-date=2014-02-21 |url-status=dead}}
* {{usurped|1=[https://web.archive.org/web/20070408171719/http://www.epiacenter.com/modules.php?name=Content&pa=showpage&pid=87 Review of the EPIA EN15000 with VIA C7 Processor]}}
* [http://www.via.com.tw/en/products/processors/c7/ VIA C7 Processor]
* [https://web.archive.org/web/20070419142654/http://www.via.com.tw/en/products/processors/c7-m/ VIA C7-M Processor]
* [https://www.pricenfees.com/digit-life-archives/detailed-platform-analysis-rightmark-memory-analyzer-part-12-via-c7c7-m-processors Detailed Platform Analysis in RightMark Memory Analyzer. Part 12: VIA C7/C7-M Processors, translated in English]
* http://www.cpushack.com/VIA.html
* https://www.pricenfees.com/digit-life-archives/via-cyrix-iii-samuel-2-600-667-mhz
* https://web.archive.org/web/20060615180950/http://www.sandpile.org/impl/c5xl.htm

{{VIA}}

{{DEFAULTSORT:Via C7}}
[[Category:VIA Technologies x86 microprocessors|C7]]
[[Category:Embedded microprocessors]]
[[Category:Computer-related introductions in 2005]]