Editing Zilog Z280

{{notability|date=August 2023}}
{{Short description|16-bit microprocessor}}
[[File:Z280 PLCC 1987.png|thumb|right|251px|The Z280 in a [[Plastic leaded chip carrier|PLCC68]] package]]
[[File:STEbus Z280 CPU on 100x160mm Eurocard.png|thumb|STEbus Z280 processor]]

The '''Zilog Z280''' is a [[16-bit computing|16-bit]] microprocessor designed by [[Zilog]] as an enhancement of the [[Zilog Z80]] architecture and integrating improvements from the abandoned [[Zilog Z800]] project. First introduced in July 1987, the Z280 is considered to be a commercial failure.

The Z280 was fabricated in [[CMOS]],<ref>EDN November 27, 1986 p133</ref> added a [[memory management unit]] (MMU) to expand the [[Address space|addressing range]] to 16&nbsp;[[Megabyte|MB]], features for [[Computer multitasking|multitasking]] and [[multiprocessor]] and [[coprocessor]] configurations, and 256 bytes of on-chip static RAM, configurable as either a [[CPU cache|cache]] for instructions and/or data, or as part of the ordinary address space. It has a huge number of new [[instruction (computer science)|instruction]]s and [[addressing mode]]s giving a total of over 2000 combinations. It offers Supervisor and User operating modes, and optionally separate address spaces for instructions and data in both modes (four total possible address spaces). Its crystal or external [[clock signal]] is divided by half to drive the CPU. The CPU clock can be further divided by 1, 2, or 4 times to drive the bus (e.g. 12&nbsp;[[MHz]] [[CPU]] divided by 4 will drive the [[computer bus|bus]] at 3&nbsp;MHz). Unlike the Z80 the Z280 multiplexes the lowest byte of its address onto the data bus; the rest of the address lines are not multiplexed. If running in Z-BUS mode, the data bus is expanded to 16 bits, multiplexed with the lower 16 bits of address. Although the z280 universally handles 16-bit math, moves, and even has a 16-bit bus option, it only supports 8-bit operations for logic functions such as AND, OR, and XOR.

More successful extensions of the [[Z80]]-architecture include the Hitachi [[HD64180]] in 1986 and [[Zilog eZ80]] in 2001, among others.

The Z280 had many advanced features for its time, most of them never seen again on a Zilog processor:<ref>{{Cite book |url=http://www.classiccmp.org/hp/zilog/z280_manual.pdf |title=Z280 MPU Microprocessor Unit Preliminary Technical Manual |publisher=[[Zilog]] |year=1989 |location=[[San Jose, California]] |access-date=2009-07-15 |archive-url=https://web.archive.org/web/20190911051642/http://www.classiccmp.org/hp/zilog/z280_manual.pdf |archive-date=2019-09-11}}</ref>

* On-chip instruction and/or data [[CPU cache|cache]], or on-chip RAM
* [[Instruction pipelining]]
* High performance 16-bit Z-BUS interface or 8-bit Z80-compatible bus interface
* Built-in MMU with [[memory protection]]
* Ability to determine which register set is in context with instructions JAF and JAR
* Three on-chip 16-bit counter/timers
* Four on-chip [[Dynamic memory allocation|DMA]] channels
* On-chip full duplex UART
* User I/O [[Trap (computing)|trap]]
* [[Supervisor mode]] ([[Privilege (computing)|privileged]] instructions)
* [[Illegal instruction]] trap{{Citation needed|reason=The Z280 manuals available online don't mention this trap|date=August 2021}}
* [[Coprocessor]] emulation [[Trap (computing)|trap]]
* [[Burst mode (computing)|Burst mode memory access]]
* [[Multiprocessor]] support, with many bus configuration modes
* Support for multiple external coprocessors through an accelerated communication interface
* Multiple I/O pages, which also allows for internal I/O devices without restricting the address range of the I/O ports like on [[eZ80]], or conflicting with existing [[motherboard]] devices, like the [[Z180]].
* [[Stack overflow]] warning

In the early 1990s, a small number of single-board computers based on the Zilog Z280 were designed and produced  by Tilmann Reh, but the CPU was never used in any commercially produced computer.<ref>{{cite web |url=https://github.com/wwarthen/CPU280 |title=CPU280 System Software |accessdate=2024-11-10}}</ref>

In 2016, Lamar Owens contacted Tilmann Reh and obtained permission to have a small new run of the CPU280 system PCBs created, getting ten boards made and distributed to several beta builders. Wayne Warthen developed a build setup to rebuild the EPROM images and floppy disk images, and set up a page at Github for distribution and development. In spring 2018, another ten boards were made.<ref>{{cite web |url=https://www.retrobrewcomputers.org/doku.php?id=boards:sbc:cpu280:start&s[]=z280 |title=CPU280 |accessdate=2024-11-10}}</ref>

==References==
{{Reflist}}
{{refbegin}}
* {{Cite book |title=Z80 Family Data Book |date=January 1989 |publisher=[[Zilog]] |location=[[San Jose, California]]}}
* {{Cite journal |last=Reh |first=Tilmann |date=1991-09-16 |title=The CPU280 and Z280 |url=http://www.z80.info/cpu280.txt |journal=TCJ |access-date=2009-07-15}}
{{refend}}

==Further reading==
* {{Cite web |last=Harston |first=J.G. |date=1998-04-15 |title=Full Z280 Opcode List |url=http://mdfs.net/Docs/Comp/Z280/OpList |access-date=2009-07-15}}

{{zilog}}

[[Category:Zilog microprocessors]]
[[Category:16-bit microprocessors]]

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