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Zilog Z80000
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{{Short description|32-bit microprocessor}} {{More citations needed|date=April 2024}} <!-- Note: The figures in this document come from the preliminary manual referenced below. It is possible that the final processor did not have all of these capabilities. -->The '''Zilog Z80000''' is an unreleased [[32-bit]] [[central processing unit|processor]] designed by [[Zilog]] and completed in 1986. The Z80000 is a 32-bit expansion of the [[16-bit]] [[Zilog Z8000]] with [[multiprocessing]] capability, a six-stage [[instruction pipeline]], and a 256-byte [[CPU cache|cache]]. It can address 4 [[gigabyte]]s of [[Random-access memory|RAM]], but cannot execute code written for the Z8000 or [[Zilog Z80|Z80]]. Described at the time as a "[[Mainframe computer|mainframe]] on a chip", the processor is in many ways an equivalent to [[Intel]]'s [[i386|80386]]. Delays in the initial manufacturing pushed back its availability date to after that of the 386, and the Z80000 only made it to a test sampling phase without ever being released commercially.<ref>{{cite web |url=https://www.kranenborg.org/z8000/ |title=The Z8000 / Z80,000 / Z16C00 CPU homepage |accessdate=2024-11-10}}</ref> ==Description== Like the Z8000 it is based on, the Z80000 has sixteen general-purpose [[processor register|registers]], but expanded from the Z8000's 16-bit to 32-bit. Like the Z8000, the Z80000 allows its registers to be combined, in this case using two 32-bit registers to act as a single 64-bit one. To support the Z8000s 16-bit wide data, the Z80000 can place two 16-bit values in a single 32-register. The processor includes a [[memory management unit]] that provides [[protected memory]], important for [[computer multitasking|multitasking]], and [[virtual memory]] addressing for temporary storage of RAM on a [[hard disk]]. The processor has three methods of accessing memory: * compact mode β meant for small programs, could only access 64 KB (16-bit addresses, equivalent to the Z8000's non-segmented mode). Address bits 31-16 of all virtual addresses comes from address bits 31-16 of the program counter. * segmented mode β 32,768 segments of 64 KB (16-bit address; comprising memory from 0-2GB) ''and'' 128 segments of 16 MB (24-bit address; comprising memory from 2GB-4GB), making a total of 4 GB (32-bit address) of accessible memory. * linear mode β direct 4 GB (32-bit address) accessible memory On the Z80000 CPU, [[interrupt|interrupts]] are part of a category known as exceptions. This category includes resets, bus errors, interrupts, and traps.<ref>{{cite web |url=http://bitsavers.trailing-edge.com/components/zilog/z80000/Z80000_CPU_Preliminary_Technical_Manual_Sep84.pdf#page=12 |page=12(1-3) |title=Z80,OOOTM CPU Preliminary Technical Manual September 1984 |accessdate=2023-12-08}}</ref> The processor is designed to interoperate with other [[integrated circuit]]s designed for use with the Z8000, such as the [[Zilog Z8070]] [[floating-point]] [[coprocessor]]. The Z320 was the [[CMOS]] version of the Z80000. ==References== {{reflist}} * {{cite book | title = Zilog Z80,000 CPU Preliminary Technical Manual | url = http://bitsavers.trailing-edge.com/components/zilog/z80000/Z80000_CPU_Preliminary_Technical_Manual_Sep84.pdf | access-date = 2017-01-19 |date=September 1984 | publisher = [[Zilog]] | location = [[San Jose, California]] }} ==External links== * [https://www.cpushack.com/CPU/cpu3.html#Sec3Part3 Z80000 at ''Great Microprocessors of the Past and Present''] * [https://www.datasheetarchive.com/pdf/download.php?id=e100c073c2c967c20354c08a71ae01dfc32be5&type=O&term=Z80000%2520Zilog Zilog Z80,000β’ CPU Product Specification], October 1988 at Datasheet Archive * [https://www.datasheetarchive.com/pdf/download.php?id=ca784e6d56870655eabc374817d211e4a2e1db&type=O&term=Z80000%2520Zilog Zilog Z8000 Family Architecture - A High-Performance 16-Bit Architecture With 32-Bit Migration - Z8000β’ 16 Bit CPU's - Z80,000β’ 32 Bit CPU's] at Datasheet Archive {{zilog}} [[Category:Zilog microprocessors]] [[Category:32-bit microprocessors]] {{microcompu-stub}}
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