One-instruction set computer

Template:Short description Template:Distinguish A one-instruction set computer (OISC), sometimes referred to as an ultimate reduced instruction set computer (URISC), is an abstract machine that uses only one instructionTemplate:Sndobviating the need for a machine language opcode.<ref name=urisc /><ref name=caamp /><ref name=agut /> With a judicious choice for the single instruction and given arbitrarily many resources, an OISC is capable of being a universal computer in the same manner as traditional computers that have multiple instructions.<ref name=caamp />Template:Rp OISCs have been recommended as aids in teaching computer architecture<ref name=urisc />Template:Rp<ref name=caamp />Template:Rp and have been used as computational models in structural computing research.<ref name=agut /> The first carbon nanotube computer is a 1-bit one-instruction set computer (and has only 178 transistors).<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

Machine architectureEdit

In a Turing-complete model, each memory location can store an arbitrary integer, andTemplate:Snddepending on the mode, there may be arbitrarily many locations. The instructions themselves reside in memory as a sequence of such integers.

There exists a class of universal computers with a single instruction based on bit manipulation such as bit copying or bit inversion. Since their memory model is finite, as is the memory structure used in real computers, those bit manipulation machines are equivalent to real computers rather than to Turing machines.<ref name="mazonka">Oleg Mazonka, "Bit Copying: The Ultimate Computational Simplicity", Complex Systems Journal 2011, Vol 19, N3, pp. 263–285</ref>

Currently known OISCs can be roughly separated into three broad categories:

Bit-manipulating machines
Transport triggered architecture machines
Arithmetic-based Turing-complete machines

Bit-manipulating machinesEdit

Bit-manipulating machines are the simplest class.

FlipJumpEdit

The FlipJump machine has 1 instruction, a;b - flips the bit a, then jumps to b. This is the most primitive OISC, but it's still useful. It can successfully do math/logic calculations, branching, pointers, and calling functions with the help of its standard library.

BitBitJumpEdit

A bit copying machine,<ref name="mazonka" /> called BitBitJump, copies one bit in memory and passes the execution unconditionally to the address specified by one of the operands of the instruction. This process turns out to be capable of universal computation (i.e. being able to execute any algorithm and to interpret any other universal machine) because copying bits can conditionally modify the copying address that will be subsequently executed.

Toga computerEdit

Another machine, called the Toga Computer, inverts a bit and passes the execution conditionally depending on the result of inversion. The unique instruction is TOGA(a,b) which stands for TOGgle a And branch to b if the result of the toggle operation is true.

Template:Expand section

Multi-bit copying machineEdit

Similar to BitBitJump, a multi-bit copying machine copies several bits at the same time. The problem of computational universality is solved in this case by keeping predefined jump tables in the memory.Template:Clarify

Transport triggered architectureEdit

Transport triggered architecture (TTA) is a design in which computation is a side effect of data transport. Usually, some memory registers (triggering ports) within common address space perform an assigned operation when the instruction references them. For example, in an OISC using a single memory-to-memory copy instruction, this is done by triggering ports that perform arithmetic and instruction pointer jumps when written to.

Arithmetic-based Turing-complete machinesEdit

Arithmetic-based Turing-complete machines use an arithmetic operation and a conditional jump. Like the two previous universal computers, this class is also Turing-complete. The instruction operates on integers which may also be addresses in memory.

Currently there are several known OISCs of this class, based on different arithmetic operations:

addition (addleq, add and branch if less than or equal to zero)<ref name="esolang-addleq">{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref>

decrement (DJN, Decrement and branch (Jump) if Nonzero)<ref name="esolang-djn">{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref>

increment (P1eq, Plus 1 and branch if equal to another value)<ref name="esolang-p1eq">{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref>

subtraction (subleq, subtract and branch if less than or equal to zero)<ref name="mazonka-subleq">{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref><ref name="esolang-subleq">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

positive subtraction when possible, else branch (Arithmetic machine)<ref name="melzak">

Template:Cite journal</ref>

Instruction typesEdit

Common choices for the single instruction are:

Subtract and branch if less than or equal to zero
Subtract and branch if negative
Subtract if positive else branch
Reverse subtract and skip if borrow
Move (used as part of a transport triggered architecture)<ref name="movfuscator">{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref>

Subtract and branch if non zero (SBNZ a, b, c, destination)
Cryptoleq (heterogeneous encrypted and unencrypted computation)

Only one of these instructions is used in a given implementation. Hence, there is no need for an opcode to identify which instruction to execute; the choice of instruction is inherent in the design of the machine, and an OISC is typically named after the instruction it uses (e.g., an SBN OISC,<ref name=caamp />Template:Rp the SUBLEQ language,<ref name="agut" />Template:Rp etc.). Each of the above instructions can be used to construct a Turing-complete OISC.

This article presents only subtraction-based instructions among those that are not transport triggered. However, it is possible to construct Turing complete machines using an instruction based on other arithmetic operations, e.g., addition. For example, one variation known as DLN (Decrement and jump if not zero) has only two operands and uses decrement as the base operation. For more information see Subleq derivative languages [1].

Subtract and branch if not equal to zeroEdit

The SBNZ a, b, c, d instruction ("subtract and branch if not equal to zero") subtracts the contents at address a from the contents at address b, stores the result at address c, and then, if the result is not 0, transfers control to address d (if the result is equal to zero, execution proceeds to the next instruction in sequence).<ref name=agut />

Subtract and branch if less than or equal to zeroEdit

The Template:Mono instruction ("subtract and branch if less than or equal to zero") subtracts the contents at address Template:Mono from the contents at address Template:Mono, stores the result at address Template:Mono, and then, if the result is not positive, transfers control to address Template:Mono (if the result is positive, execution proceeds to the next instruction in sequence).<ref name=agut />Template:Rp Pseudocode:

Instruction <syntaxhighlight lang="nasm" inline>subleq a, b, c</syntaxhighlight>
    Mem[b] = Mem[b] - Mem[a]
    if (Mem[b] ≤ 0)
        goto c

Conditional branching can be suppressed by setting the third operand equal to the address of the next instruction in sequence. If the third operand is not written, this suppression is implied.

A variant is also possible with two operands and an internal accumulator, where the accumulator is subtracted from the memory location specified by the first operand. The result is stored in both the accumulator and the memory location, and the second operand specifies the branch address:

Instruction <syntaxhighlight lang="nasm" inline>subleq2 a, b</syntaxhighlight>
    Mem[a] = Mem[a] - ACCUM
    ACCUM = Mem[a]
    if (Mem[a] ≤ 0)
        goto b

Although this uses only two (instead of three) operands per instruction, correspondingly more instructions are then needed to effect various logical operations.

Synthesized instructionsEdit

It is possible to synthesize many types of higher-order instructions using only the Template:Mono instruction.<ref name=agut />Template:Rp

Unconditional branch:

Template:Mono: <syntaxhighlight lang="nasm">

 subleq Z, Z, c

</syntaxhighlight>

Addition can be performed by repeated subtraction, with no conditional branching; e.g., the following instructions result in the content at location Template:Mono being added to the content at location Template:Mono:

Template:Mono: <syntaxhighlight lang="nasm">

 subleq a, Z
 subleq Z, b
 subleq Z, Z

</syntaxhighlight>

The first instruction subtracts the content at location Template:Mono from the content at location Template:Mono (which is 0) and stores the result (which is the negative of the content at Template:Mono) in location Template:Mono. The second instruction subtracts this result from Template:Mono, storing in Template:Mono this difference (which is now the sum of the contents originally at Template:Mono and Template:Mono); the third instruction restores the value 0 to Template:Mono.

A copy instruction can be implemented similarly; e.g., the following instructions result in the content at location Template:Mono getting replaced by the content at location Template:Mono, again assuming the content at location Template:Mono is maintained as 0:

Template:Mono: <syntaxhighlight lang="nasm">

 subleq b, b
 subleq a, Z
 subleq Z, b
 subleq Z, Z

</syntaxhighlight>

Any desired arithmetic test can be built. For example, a branch-if-zero condition can be assembled from the following instructions:

Template:Mono: <syntaxhighlight lang="nasm">

 subleq b, Z, L1
 subleq Z, Z, OUT

L1:

 subleq Z, Z
 subleq Z, b, c

OUT:

...

</syntaxhighlight>

Subleq2 can also be used to synthesize higher-order instructions, although it generally requires more operations for a given task. For example, no fewer than 10 subleq2 instructions are required to flip all the bits in a given byte:

Template:Mono: <syntaxhighlight lang="nasm">

 subleq2 tmp          ; tmp = 0 (tmp = temporary register)
 subleq2 tmp
 subleq2 one          ; acc = -1
 subleq2 a            ; a' = a + 1
 subleq2 Z            ; Z = - a - 1
 subleq2 tmp          ; tmp = a + 1
 subleq2 a            ; a' = 0
 subleq2 tmp          ; load tmp into acc
 subleq2 a            ; a' = - a - 1 ( = ~a )
 subleq2 Z            ; set Z back to 0

</syntaxhighlight>

EmulationEdit

The following program (written in pseudocode) emulates the execution of a Template:Mono-based OISC:

int memory[], program_counter, a, b, c
program_counter = 0
while (program_counter >= 0):
    a = memory[program_counter]
    b = memory[program_counter+1]
    c = memory[program_counter+2]
    if (a < 0 or b < 0):
        program_counter = -1
    else:
        memory[b] = memory[b] - memory[a]
        if (memory[b] > 0):
            program_counter += 3
        else:
            program_counter = c

</syntaxhighlight>

This program assumes that Template:Mono is indexed by nonnegative integers. Consequently, for a Template:Mono instruction (Template:Mono, Template:Mono, Template:Mono), the program interprets Template:Mono, Template:Mono, or an executed branch to Template:Mono as a halting condition. Similar interpreters written in a Template:Mono-based language (i.e., self-interpreters, which may use self-modifying code as allowed by the nature of the Template:Mono instruction) can be found in the external links below.

A general purpose SMP-capable 64-bit operating system called Dawn OS has been implemented in an emulated Subleq machine. The OS contains a C-like compiler. Some memory areas in the virtual machine are used for peripherals like the keyboard, mouse, hard drives, network card, etc. Basic applications written for it include a media player, painting tool, document reader and scientific calculator.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

A 32-bit Subleq computer with a graphic display and a keyboard called Izhora has been constructed by Yoel Matveyev as a large cellular automaton pattern.<ref>https://www.gazetaeao.ru/zanimatelnaya-nauka-vchera-segodnya-zavtra/ A Russian article on popular science in Birobidzhaner Shtern with a brief discussion of Yoel Matveyev's Izhora computer</ref><ref>https://habr.com/ru/post/584596/ A description of the virtual computer Izhora on Habr (in Russian)</ref>

CompilationEdit

There is a compiler called Higher Subleq written by Oleg Mazonka that compiles a simplified C program into Template:Mono code.<ref>Oleg Mazonka A Simple Multi-Processor Computer Based on Subleq</ref>

Alternatively there is a self hosting Forth implementation written by Richard James Howe that runs on top of a Subleq VM and is capable of interactive programming of the Subleq machine <ref>Richard James Howe SUBLEQ eForth</ref>

Subtract and branch if negativeEdit

The Template:Mono instruction ("subtract and branch if negative"), also called Template:Mono, is defined similarly to Template:Mono:<ref name=caamp />Template:Rp

Instruction <syntaxhighlight lang="nasm" inline>subneg a, b, c</syntaxhighlight>
    Mem[b] = Mem[b] - Mem[a]
    if (Mem[b] < 0)
        goto c

Conditional branching can be suppressed by setting the third operand equal to the address of the next instruction in sequence. If the third operand is not written, this suppression is implied.

Synthesized instructionsEdit

It is possible to synthesize many types of higher-order instructions using only the Template:Mono instruction. For simplicity, only one synthesized instruction is shown here to illustrate the difference between Template:Mono and Template:Mono.

Unconditional branch:<ref name=caamp />Template:Rp

Template:Mono: <syntaxhighlight lang="nasm">

 subneg POS, Z, c

</syntaxhighlight>

where Template:Mono and Template:Mono are locations previously set to contain 0 and a positive integer, respectively;

Unconditional branching is assured only if Template:Mono initially contains 0 (or a value less than the integer stored in Template:Mono). A follow-up instruction is required to clear Template:Mono after the branching, assuming that the content of Template:Mono must be maintained as 0.

subneg4Edit

A variant is also possible with four operands – subneg4. The reversal of minuend and subtrahend eases implementation in hardware. The non-destructive result simplifies the synthetic instructions.

Instruction <syntaxhighlight lang="nasm" inline>subneg s, m, r, j</syntaxhighlight>
    (* subtrahend, minuend, result and jump addresses *)
    Mem[r] = Mem[m] - Mem[s]
    if (Mem[r] < 0)
        goto j

Arithmetic machineEdit

In an attempt to make Turing machine more intuitive, Z. A. Melzak consider the task of computing with positive numbers. The machine has an infinite abacus, an infinite number of counters (pebbles, tally sticks) initially at a special location S. The machine is able to do one operation:

Take from location X as many counters as there are in location Y and transfer them to location Z and proceed to instruction y.
If this operation is not possible because there is not enough counters in X, then leave the abacus as it is and proceed to instruction n. <ref>Template:Cite journal</ref>

In order to keep all numbers positive and mimic a human operator computing on a real world abacus, the test is performed before any subtraction. Pseudocode:

Instruction <syntaxhighlight lang="nasm" inline>melzak X, Y, Z, n, y</syntaxhighlight>
    if (Mem[X] < Mem[Y])
        goto n
    Mem[X] -= Mem[Y]
    Mem[Z] += Mem[Y]
    goto y

After giving a few programs: multiplication, gcd, computing the n-th prime number, representation in base b of an arbitrary number, sorting in order of magnitude, Melzak shows explicitly how to simulate an arbitrary Turing machine on his arithmetic machine.

Template:Mono: <syntaxhighlight lang="nasm">

multiply:

 melzak P, ONE, S, stop                ; Move 1 counter from P to S. If not possible, move to stop.
 melzak S, Q, ANS, multiply, multiply  ; Move q counters from S to ANS. Move to the first instruction.

stop: </syntaxhighlight> where the memory location P is p, Q is q, ONE is 1, ANS is initially 0 and at the end pq, and S is a large number.

He mentions that it can easily be shown using the elements of recursive functions that every number calculable on the arithmetic machine is computable. A proof of which was given by Lambek<ref name="lambek">Template:Cite journal</ref> on an equivalent two instruction machine : X+ (increment X) and X− else T (decrement X if it not empty, else jump to T).

Reverse subtract and skip if borrowEdit

In a reverse subtract and skip if borrow (RSSB) instruction, the accumulator is subtracted from the memory location and the next instruction is skipped if there was a borrow (memory location was smaller than the accumulator). The result is stored in both the accumulator and the memory location. The program counter is mapped to memory location 0. The accumulator is mapped to memory location 1.<ref name=caamp />

Instruction <syntaxhighlight lang="nasm" inline>rssb x</syntaxhighlight>
    ACCUM = Mem[x] - ACCUM
    Mem[x] = ACCUM
    if (ACCUM < 0)
        goto PC + 2

ExampleEdit

To set x to the value of y minus z:

First, move z to the destination location x.

 RSSB temp # Three instructions required to clear acc, temp [See Note 1]
 RSSB temp
 RSSB temp
 RSSB x    # Two instructions clear acc, x, since acc is already clear
 RSSB x
 RSSB y    # Load y into acc: no borrow
 RSSB temp # Store -y into acc, temp: always borrow and skip
 RSSB temp # Skipped
 RSSB x    # Store y into x, acc

Second, perform the operation.

 RSSB temp # Three instructions required to clear acc, temp
 RSSB temp
 RSSB temp
 RSSB z    # Load z
 RSSB x    # x = y - z [See Note 2]

</syntaxhighlight>

[Note 1] If the value stored at "temp" is initially a negative value and the instruction that executed right before the first "RSSB temp" in this routine borrowed, then four "RSSB temp" instructions will be required for the routine to work.
[Note 2] If the value stored at "z" is initially a negative value then the final "RSSB x" will be skipped and thus the routine will not work.

Transport triggered architectureEdit

{{#invoke:Labelled list hatnote|labelledList|Main article|Main articles|Main page|Main pages}} A transport triggered architecture uses only the move instruction, hence it was originally called a "move machine". This instruction moves the contents of one memory location to another memory location combining with the current content of the new location:<ref name=caamp />Template:Rp<ref name=dwj />

Instruction <syntaxhighlight lang="nasm" inline>movx a, b</syntaxhighlight> (also written a -> b)
    OP = GetOperation(Mem[b])
    Mem[b] := OP(Mem[a], Mem[b])

The operation performed is defined by the destination memory cell. Some cells are specialized in addition, some other in multiplication, etc. So memory cells are not simple store but coupled with an arithmetic logic unit (ALU) setup to perform only one sort of operation with the current value of the cell. Some of the cells are control flow instructions to alter the program execution with jumps, conditional execution, subroutines, if-then-else, for-loop, etc...

A commercial transport triggered architecture microcontroller has been produced called MAXQ, which hides the apparent inconvenience of an OISC by using a "transfer map" that represents all possible destinations for the move instructions.<ref name=deh />

CryptoleqEdit

File:Cryptoleq Processor.jpeg

Cryptoleq processor made at NYU Abu Dhabi

Cryptoleq<ref name=crq /> is a language similar to Subleq. It consists of one eponymous instruction and is capable of performing general-purpose computation on encrypted programs. Cryptoleq works on continuous cells of memory using direct and indirect addressing, and performs two operations Template:Math and Template:Math on three values A, B, and C:

Instruction <syntaxhighlight lang="nasm" inline>cryptoleq a, b, c</syntaxhighlight>
    Mem[b] = O₁(Mem[a], Mem[b])
    if O₂(Mem[b]) ≤ 0
        IP = c
    else
        IP = IP + 3

where a, b and c are addressed by the instruction pointer, IP, with the value of IP addressing a, IP + 1 point to b and IP + 2 to c.

In Cryptoleq operations Template:Math and Template:Math are defined as follows:

<math>\begin{array}{lcl} O_1(x,y) & = & x^{-1} y \,\bmod\, N^2 \end{array}</math>

<math>\begin{array}{lcl} O_2(x) & = & \left \lfloor \frac{x-1}{N} \right \rfloor \end{array}</math>

The main difference with Subleq is that in Subleq, Template:Math simply subtracts Template:Mvar from Template:Mvar and Template:Math equals to Template:Mvar. Cryptoleq is also homomorphic to Subleq, modular inversion and multiplication is homomorphic to subtraction and the operation of Template:Math corresponds the Subleq test if the values were unencrypted. A program written in Subleq can run on a Cryptoleq machine, meaning backwards compatibility. However, Cryptoleq implements fully homomorphic calculations and is capable of multiplications. Multiplication on an encrypted domain is assisted by a unique function G that is assumed to be difficult to reverse engineer and allows re-encryption of a value based on the Template:Math operation:

<math>G(x,y) = \begin{cases} \tilde{0}, & \text{if }O_2(\bar{x})\text{ }\leq 0 \\ \tilde{y}, & \text{otherwise} \end{cases}</math>

where <math>\tilde{y}</math> is the re-encrypted value of Template:Mvar and <math>\tilde{0}</math> is encrypted zero. Template:Mvar is the encrypted value of a variable, let it be Template:Mvar, and <math>\bar{x}</math> equals Template:Tmath.

The multiplication algorithm is based on addition and subtraction, uses the function G and does not have conditional jumps nor branches. Cryptoleq encryption is based on Paillier cryptosystem.

ReferencesEdit

Template:Reflist

External linksEdit

Subleq on the esoteric programming languages wiki – interpreters, compilers, examples and derivative languages
Template:YouTube by Christopher Domas
Laboratory subleq computer – FPGA implementation using VHDL
The Retrocomputing Museum – SBN emulator and sample programs
Laboratory SBN computer – implemented with 7400 series integrated circuits
RSSB on the esoteric programming languages wiki – interpreters and examples
Dr. Dobb's 32-bit OISC implementation – transport triggered architecture (TTA) on an FPGA using Verilog
Introduction to the MAXQ Architecture – includes transfer map diagram
OISC-Emulator – graphical version
TrapCC (recent Intel x86 MMUs are actually Turing-complete OISCs.)
Izhora – Yoel Matveyev's Subleq computer built as a cellular automation
SBN simulator – simulator and design inspired by CARDboard Illustrative Aid to Computation
One-bit Computing at 60 Hertz – intermediate between a computer and a state machine
The NOR Machine Template:Sndinfo on building a CPU with only one Instruction
SUBLEQ eFORTH A complete Forth interpreter running on the SUBLEQ OISC.
Cryptoleq Template:SndCryptoleq resources repository
CAAMP Template:SndComputer Architecture A Minimalist Perspective
SICO – Single Instruction COmputer: a variant of SUBLEQ using unsigned integers

Template:CPU technologies Template:Authority control Template:Esoteric programming languages

One-instruction set computer

Contents

Machine architectureEdit

Bit-manipulating machinesEdit

FlipJumpEdit

BitBitJumpEdit

Toga computerEdit

Multi-bit copying machineEdit

Transport triggered architectureEdit

Arithmetic-based Turing-complete machinesEdit

Instruction typesEdit

Subtract and branch if not equal to zeroEdit

Subtract and branch if less than or equal to zeroEdit

Synthesized instructionsEdit

EmulationEdit

CompilationEdit

Subtract and branch if negativeEdit

Synthesized instructionsEdit

subneg4Edit

Arithmetic machineEdit

Reverse subtract and skip if borrowEdit

ExampleEdit

Transport triggered architectureEdit

CryptoleqEdit

See alsoEdit

ReferencesEdit

External linksEdit