List of Intel chipsets

Revision as of 22:49, 28 May 2025 by 95.172.237.13 (talk) (→‎Core 2 chipsets: I've looked up a number of chipset specification sheets and motherboard manuals on The Retro Web and they all indicate that G/Q43/45 chipsets DO support PCIe rev 2.0)
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Template:Short description Template:Multiple issues

This article provides a list of motherboard chipsets made by Intel, divided into three main categories: those that use the PCI bus for interconnection (the 4xx series), those that connect using specialized "hub links" (the 8xx series), and those that connect using PCI Express (the 9xx series). The chipsets are listed in chronological order.

Pre-chipset situationEdit

An earlier chipset support for Intel 8085 microprocessor can be found at MCS-85 family section.

Early IBM XT-compatible mainboards did not yet have a chipset, but relied instead on a collection of discrete TTL chips by Intel:<ref name=Tooley>Template:Cite book</ref>

  • the 8284 clock generator
  • the 8288 bus controller
  • the 8254 programmable interval timer
  • the 8255 parallel I/O interface
  • the 8259 programmable interrupt controller
  • the 8237 DMA controller

Early chipsetsEdit

To integrate the functions needed on a mainboard into a smaller number of ICs, Intel licensed the ZyMOS POACH chipset for its Intel 80286 and Intel 80386SX processors (the 82230/82231 High Integration AT-Compatible Chip Set). The 82230 covers this combination of chips: 82C284 clock, 82288 bus controller, and dual 8259A interrupt controllers among with other components. The 82231 covers this combination of chips: 8254 interrupt timer, 74LS612 memory mapper and dual 8237A DMA controller among with other components. Both set were available US$60 for 10 MHz version and US$90 for 12 MHz version in quantities of 100.<ref>Ormsby, John, Editor, "New Product Focus: Components: Intel's 82X3X Chip-set Handles Logic Functions That Once Required The Services Of Sources Of Chips", Intel Corporation, Microcomputer Solutions, January/February 1988, page 13</ref> This chipset can be used with an 82335 High-integration Interface Device to provide support for the Intel 386SX.<ref name="Lewnes, Ann 1988, page 2">Lewnes, Ann, "Welcome 80386SX", Microcomputer Solutions, September/October 1988, page 2</ref><ref name="intel1989"/>

List of early Intel chipset includes:<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

|CitationClass=web }}</ref>

  • 82310 MCA family chipset - announced in April 1988.<ref>Template:Cite news</ref> This chipset also supports the 80386SX based machines as well.<ref name="Lewnes, Ann 1988, page 2"/> Which it does includes:<ref name="intel1989">{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref><ref>Intel Corporation, "NewsBit: Intel Technology Powers New Tandy PC", Microcomputer Solutions, July/August 1988, page 1</ref>

    • 82306 Local Channel Support Chip
    • 82307 DMA Controller/Central Arbiter
    • 82308 Micro Channel Bus Controller
    • 82309 Address Bus Controller
    • 82706 VGA Graphics Controller
  • 82311 MCA - announced in November 1988.<ref>Template:Cite news</ref><ref>{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref> Includes: 82303 and 82304 Local I/O Channel Support Chips, 82307 DMA Controller/Central Arbiter, 82308 Micro Channel Bus Controller, 82309 Address Bus Controller, 82706 VGA Graphics Controller, 82077 Floppy Disk Controller.<ref name="intel1989"/><ref name="infoworld-1989-11-13">Template:Cite news</ref>

  • 82320 MCA - announced in April 1989.<ref>Template:Cite news</ref> This chipset supports the i486 microprocessor. It was expected to be available in the later half of 1989.<ref name="Intel Corporation 1989, page 1"/>
  • 82340SX PC AT - announced in January 1990, it is the Topcat chipset licensed from VLSI.<ref name="intelToMarketVLSI">Template:Cite news</ref>
  • 82340DX PC AT - announced in January 1990, it is the Topcat chipset licensed from VLSI.<ref name="intelToMarketVLSI"/>
  • 82350 EISA - announced in September 1988.<ref>Template:Cite news</ref><ref name="infoworld-1989-11-13" /> This chipset supports the i486 microprocessor. It was expected to be available in the later half of 1989.<ref name="Intel Corporation 1989, page 1">Intel Corporation, "NewsBits: Intel Introduces EISA and MCA Support for i486 Microprocessor", Microcomputer Solutions, July/August 1989, page 1</ref>
  • 82350DT EISA - announced in April 1991.<ref>Template:Cite news</ref> This version supports Intel486 DX2 CPU.<ref>Hodson, Gerri, "The Intel486 DX2 Microprocessor: Speed-Doubler Technology", Intel Corporation, Microcomputer Solutions, May/June 1992, page 2-5</ref>
  • 82360SL - announced in October 1990.<ref>Template:Cite news</ref> It was a chipset for the mobile 80386SL and 80486SL processors. It integrated DMA controller, an interrupt controller PIC, serial and parallel ports, I/O Control, NMI, Real Time Clock, Timers and power-management logic for the processor. This chipset contains 226,000 transistors using the one-micron CHMOS IV technology. It was available for US$45 in quantities of 1,000.<ref name="Chen, Allan 1991, page 2"/>
  • 82365SL - PC Card Interface Controller. This support PCMCIA 2.0 standard using the Exchangeable Card Architecture which supports both I/O and memory ExCA-compliant cards. It uses the Intel386SL power-management features. This was available for US$35 in samples of quantities of 1,000-unit.<ref>Intel Corporation, "New Product Focus: Components: First Exchangeable Plug-In Cards Support PCMCIA", Microcomputer Solutions, November/December 1991, page 11</ref>
  • 82380 - High Performance 32-Bit DMA Controller with Integrated System Support Peripherals. This chipset has 20-level programmable interrupt controller a superset of Intel's 82C59 PIC. It also has four (x4) 16-bit programmable internal timers which its superset Intel's 82C54 PIT. It also has built-in DRAM refresh controller as well. It is available for US$149 and US$299 for 16 MHz and 20 MHz respectively in quantities of 100.<ref name="Intel Corporation 1987, page 10">Intel Corporation, "New Product Focus Components: The 32-Bit Computing Engine Full Speed Ahead", Solutions, May/June 1987, page 10</ref> The Intel M82380 met under MIL-STD-883 Rev. C standard. This military device was tested which includes temperature cycling between -55 and 125 °C, hermeticity and extended burn-in. This military version can have transfer rate of 32 Mbytes per seconds at 16 MHz. This military version were available in 132-lead CPGA and 164-lead CQPK. This military version were available for US$520 100-unit of quantities for the PGA version.<ref>Intel Corporation, "Focus: Components: Militarized Peripherals Support M386 Microprocessor", Microcomputer Solutions, March/April 1989, page 12</ref>
  • 82384 - Clock Generator. The available version for US$15 in quantities of 100.<ref>Intel Corporation, "New Product Focus Component: A 32-Bit Microprocessor With A Little Help From Some Friends", Special 32-Bit Issue Solutions, November/December 1985, page 13</ref>
  • 82385 - High Performance 32-Bit Cache Controller.<ref name="Intel Corporation 1987, page 10"/> This chipset was introduced in February 1987. It was available for 20 MHz version.<ref>Intel Corporation, "NewsBit: 80386 Computing Engine Now Complete", Microcomputer Solutions, November/December 1987, page 1</ref> There is 33 MHz version available for the 386DX processor.<ref name="Lewnes, Ann 1989, page 2">Lewnes, Ann, "The Intel386 Architecture Here to Stay", Intel Corporation, Microcomputer Solutions, July/August 1989, page 2</ref> Paired with 33 MHz 386 CPU and 64-Kbyte memory subsystem, it performed up to 7.8 MIPS.<ref name="Intel Corporation 1990, page 10">Intel Corporation, "New Product Focus: Components: 386 Smart Cache Reduces Subsystem to One Chip", Microcomputer Solutions, September/October 1990, page 10</ref> There is 82385SX version for the 386SX microprocessor.<ref name="Lewnes, Ann 1989, page 2"/>
  • 82395DX - High Performance Smart Cache. This chipset contains internal 16-Kbye of SRAM and 1,000 cache tags. This controller supports up to 128-Kbytes of cache memory subsystem which it features four-way set associativity; a 16-byte line size; a four, double-word write buffer; and concurrent line-buffer caching. This also support write-buffer memory update protocol and maintains cache coherency during bus snooping. Paired with 33 MHz 386 CPU and the controller can perform up to 8.3 MIPS. This was available in 196-pin PQFP for US$90 and $109 for 25- and 33-MHZ version in quantites of 1000 respectively.<ref name="Intel Corporation 1990, page 10"/> There is Intel 82395SX version which it contains 8-Kbyte of cache memory for the 80386SX microprocessor family which it performs as much as 7% better than the 82385SX version. It was available for US$44 in quantities of 1000 units housed by 132-pin PQFP. The Intel 82396SX version contains 16-Kbyte of cache memory which were available in second quarter of 1991.<ref>Intel Corporation, "New Product Focus: Components: Two New Devices Extend Smart Cache Family", Microcomputer Solutions, March/April 1991, page 13</ref>

4xx chipsetsEdit

80486 chipsetsEdit

Chipset Code Name North Bridge sSpec Number South Bridge Release Date Processors FSB SMP Memory types Max. memory Max. cacheable Parity/ECC L2 Cache Type PCI support
420TX Saturn CDC (82424TX), DPU (82423TX) SZ839

SZ868

SIO (System I/O) November 1992 V 486 Up to 33 MHz rowspan="3" Template:No FPM 128 MBTemplate:Efn rowspan="3" Template:Yes Async. 1.0
420ZX Saturn II CDC (82424ZX), DPU (82423TX) SZ884 March 1994 5 V/3.3 V 486 160 MB 2.1
420EX Aries PSC (82425EX) SZ897 (PSC)

SZ898 (IB)

IB (82426EX) Up to 50 MHz 128 MB 128 MB (/w 32KB Tag Ram & 512KB L2 Cache<ref>Intel 420EX Aries Datasheet, Page #112</ref> 2.0

Other 80486 chipsetsEdit

  • 82495DX - Cache Controller. This support zero-wait-state with two-way set associative cache with several configurable parameters. This support MESI protocol and bus snooping. It is available for US$198.<ref name="Chen, Allan page 2">Chen, Allan, "The 50-MHz Intel486 Microprocessor", Intel Corporation, Microcomputer Solutions, September/October 1991, page 2</ref>
  • 82490DX - 32-Kbyte Dual Port Intelligent Cache SRAM. Providing second level write-back cache with dual-ported buffers and registers. It is available for US$41.<ref name="Chen, Allan page 2"/>

Pentium chipsetsEdit

While not an actual Intel chipset bug, the Mercury and Neptune chipsets could be found paired with RZ1000 and CMD640 IDE controllers with data corruption bugs. L2 caches are direct-mapped with SRAM tag RAM, write-back for 430FX, HX, VX, and TX.

Chipset Code Name Part Numbers sSpec Number South Bridge Release Date Processors FSB SMP Memory types Max. memory Max. cacheable Parity/ECC L2 Cache Type PCI support AGP support
430LX Mercury<ref>Intel 430LX ("Mercury") Template:Webarchive, PC Guide, accessed August 20, 2007.</ref> 82434LX (PCMC)
2x 82433LX (LBX)
SZ914 (PCMC)

SZ942 (LBX)

SIO (ISA)
PCEB/ESC (EISA)
March 1993 P60/66 60/66 MHz Template:No FPM 192 MB 192 MB rowspan="2" Template:Partial Async. 2.0 rowspan="7" Template:No
430NX Neptune<ref>Intel 430NX ("Neptune") Template:Webarchive, PC Guide, accessed August 20, 2007.</ref> 82434NX (PCMC)
2x 82433NX (LBX)
SZ919 (PCMC)

SZ899 (LBX)

SIO (ISA)
SIO.A (DP ISA)
PCEB/ESC (EISA)
March 1994 P75+ 50/60/66 MHz Template:Yes 512 MB 512 MB
430FX Triton<ref>Intel 430FX ("Triton") Template:Webarchive, PC Guide, accessed August 20, 2007.</ref><ref name=TritonIIref>Summary of P5 chipsets Template:Webarchive, comp.sys.intel, September 1996.</ref> 82437FX/JX (TSC)
2x 82438FX (TDP)
SZ965 (A1)

SZ968 (A1)

SZ969

SZ973 (A1)

SZ975 (A1)

SZ998 (A2)

SZ999

PIIX January 1995 rowspan="2" Template:No FPM/EDO 128 MB 64 MB rowspan="2" Template:No Async. / Pburst
430MX Mobile Triton 82437MX SU036 (A1)

SU037 (A1)

SU069 (B0)

MPIIX October 1995
430HX Triton II<ref name=TritonIIref /><ref>Intel 430HX ("Triton II") Template:Webarchive, PC Guide, accessed August 20, 2007.</ref> 82439HX/JHX (TXC) SU087 (A1)

SU102 (A2)

SU115

PIIX3 February 1996 Template:Yes 512 MB 64 MB
512 MB (w/ 11-bit tag RAM)<ref>System RAM Cacheability Template:Webarchive, PC Guide, accessed July 16, 2016.</ref>
Template:Yes 2.1
430VX Triton II<ref name=TritonIIref /><ref>Intel 430VX ("Triton II", a.k.a. "Triton III") Template:Webarchive, PC Guide, accessed August 20, 2007.</ref> 82437VX (TVX)
2x 82438VX (TDX)
SU085 (A1)

SU116 (A2)

60/66 MHz rowspan="2" Template:No FPM/EDO/SDRAM 128 MB 64 MB rowspan="2" Template:No
430TX<ref>Intel 430TX Template:Webarchive, PC Guide, accessed August 20, 2007.</ref> 82439TX (MTXC) SL238 (A1)

SL28T (A2)

PIIX4 February 1997 256 MB

Pentium Pro/II/III chipsetsEdit

Chipset Code Name Part numbers sSpec Number South Bridge Release Date ProcessorsTemplate:Efn FSB SMP Memory Parity/ECC PCI support AGP support
Type Max. Bank
450KX Mars 82451KX, 82452KX, 82453KX, 82454KX SU022 (A2)

SU024 (A2)

SU025 (A1)

SU026 (A1)

SU027 (A2)

SU028 (A2)

SU029 (A1)

SU030 (A2)

SU039 (A1)

SU040 (A1)

SU041 (A2)

SU042 (A2)

SU043 (A1)

SU044 (A2)

SU061 (A3)

SU062 (A4)

SU064 (A4)

SIO, SIO.A, PIIX (ISA)
PCEB/ESC (EISA)
November 1995 Pentium Pro 60/66 MHz Template:Yes FPM GB rowspan="4" Template:Yes 2.0 rowspan="3" Template:No
450GX Orion 82451GX, 82452GX, 82453GX, 82454GX SU019 (A1)

SU055 (A1)

SU056 (A3)

SU057 (A3)

SU058 (A4)

SU059 (A4)

SU063 (A4)

SY050 (A4)

SY051 (A5)

SY052 (A6)

SY053 (A4)

SY054 (A6)

SIO.A (ISA)
PCEB/ESC (EISA)
Template:Yes (up to four) 8 GB
440FX Natoma 82441FX, 82442FX SU053 (A1)

SU054 (A1)

PIIX3 (ISA)
PCEB/ESC (EISA)
May 1996 Pentium Pro, Pentium II rowspan="2" Template:Yes FPM / EDO / BEDO 1 GB 4 2.1
440LX Balboa 82443LX SL2KK (A3)

SL2KN (A3)

PIIX4 August 1997 Pentium II, Celeron 66 MHz FPM / EDO / SDRAM citation CitationClass=web

}}</ref> || rowspan="4" Template:Yes

440EX Template:N/a 82443EX SL2SA (A0)

SL2SB

PIIX4E April 1998 Template:No EDO / SDRAM 256 MB 2 Template:No
440BX Seattle 82443BX

82443BXE

SL278 (C1)

SL2T5 (B1)

SL2VH (C1) SL85Y

Pentium II/III, Celeron 66/100 MHz rowspan="2" Template:Yes citation CitationClass=web

}}</ref> || rowspan="3" | 4 || rowspan="3" Template:Yes || 2.1

440GX Marlinspike 82443GX SL2TF (A0)

SL2VJ (A0)

June 1998 Pentium II/III, Xeon 66/100 MHz SDRAM 2 GB 2.1
450NX rowspan="4" Template:N/a 82451NX, 82452NX, 82453NX, 82454NX SL2RU (B0)

SL2RV (B1)

SL2RW (B0)

SL2RX (B0)

SL2ZA (B1)

SL36R (C0)

Template:Yes (up to four) FPM / EDO 8 GB 2.1 (64-bit optional) Template:No
440ZX-66 82443ZX SL37A November 1998 Celeron, Pentium II/III 66 MHz rowspan="4" Template:No SDRAM 512 MB 2 rowspan="4" Template:No 2.1 rowspan="3" Template:Yes
440ZX SL33W 66/100 MHz
440ZX-M 82443ZX-M SL3VP PIIX4M Pentium III, Celeron 256 MB
440MX Banister 82443MX SL37L (B0)

SL3N4 (B0)

Same chip Pentium II/III, Celeron 512 MB 2.2 Template:No

Southbridge 4xx chipsetsEdit

Template:Main article

Chipset Part Number sSpec Number ATA support USB support CMOS/clock ISA support LPC support Power management
ESC 82374EB/SB SZ867 None None rowspan="10" Template:Yes
PCEB 82375EB/SB
SIO 82378IB/ZB SZ905 rowspan="5" Template:No rowspan="8" Template:No SMM
SIO.A 82379AB
MPIIX 82371MX SU034 (A1)

SU035 (A1)

SU067 (A2)

PIO
PIIX 82371FB SZ964 (A1)

SZ967 (A1)

SZ997 (A1)

PIO/WDMA
PIIX3 82371SB SU052 (A1)

SU093 (B0)

1 Controller

2 Ports

PIIX4 82371AB SL23P

SL2 km (B0)

PIO/UDMA 33 rowspan="3" Template:Yes
PIIX4E 82371EB

82371EBE

SL2MY (A0)

SL2T3 (A0)

SL37M (A0)

SL37U (A0)

SL87F

PIIX4M 82371MB SL3CG (A0)

SL3DD (A0)

8xx chipsetsEdit

Pentium II/III chipsetsEdit

Chipset Code name Part numbers sSpec Number South bridge Release date Processors FSB SMP Memory types Max. memory Memory banks Parity or ECC PCI Ext. AGP/speed IGP
810 Whitney 82810 SL3P6

SL3P7 (A3)

SL35K

ICH/ICH0 April 1999 Celeron, Pentium II/III 66/100 MHz rowspan="4" Template:No EDO/PC100 SDRAM 512 MB 4 rowspan="9" Template:No v2.2/33 MHz rowspan="3" Template:No rowspan="7" Template:Yes
810E 82810E SL3MD (A3) ICH September 1999 66/100/133 MHz PC100/133 SDRAM
810E2 ICH2
815 Solano 82815 SL4DF (A2)

SL5YN

SL5NQ

ICH June 2000 6 rowspan="2" Template:Yes
815E ICH2 Template:Yes (2)
815G 82815G ICH/ICH0 September 2001 Celeron, Pentium III rowspan="4" Template:No rowspan="2" Template:No
815EG ICH2
815P 82815EP ICH/ICH0 March 2001 rowspan="5" Template:Yes rowspan="5" Template:No
815EP SL5NR (B0) ICH2 November 2000 Celeron, Pentium II/III
820 Camino 82820

82820DP

SL353 (B1)

SL3FT (B1)

SL3NF (B1)

SL47D (B2)

SL47F (B2)

ICH November 1999 rowspan="3" Template:Yes PC800 RDRAM/PC100 SDRAM (with MTH adapter) 1 GB 2 rowspan="3" Template:Yes
820E ICH2 June 2000
840 Carmel 82840 SL3QR ICH October 1999 Pentium III, Xeon Dual-Channel PC800 RDRAM/PC100 SDRAM (with MTH adapter) 4 GB 2×4 v2.2/33 MHz + PCI-X/66 MHz

Pentium III mobile chipsetsEdit

Chipset Code name Part numbers sSpec Number South bridge Release date Processors FSB SMP Memory types Max. memory Memory banks Parity or ECC PCI Ext. AGP/speed IGP
815EM 82815EM SL4MP ICH2-M October 2000 Mobile Celeron, Mobile Pentium III 100 MHz Template:No PC100 SDRAM 512 MB 2 Template:No v2.2/33 MHz Template:Yes Template:Yes
830M Almador 82830M SL62D ICH3-M July 2001 Celeron, Pentium III-M 100/133 MHz rowspan="3" Template:No PC133 SDRAM 1 GB 2 rowspan="3" Template:No v2.2/33 MHz rowspan="2" Template:Yes Template:Yes
830MP 82830MP SL5P7

SL62F

SL7A6

Template:No
830MG 82830MG SL5P9

SL62E

Template:No Template:Yes

Pentium 4 chipsetsEdit

Chipset Code name Part numbers sSpec Number South bridge Release date Socket Processor brands FSB SMP Memory types Memory Channels Max. memory
[ GiB ]
Parity/ECC Graphics TDP
citation CitationClass=web

}}</ref>|| Colusa || 82860 (MCH)

SL5HB ICH2 May 2001 Socket 603 Socket 604 Xeon 400 MT/s
(100 MHz QDR)
Template:Yes PC800/600 RDRAM 2 4 (w. 2 repeaters) rowspan="5" Template:Yes AGP
845 Brookdale 82845 (MCH) SL5V7 (A3)

SL5YQ

SL63W (B0)

citation CitationClass=web

}}</ref>|| rowspan="2" |Socket 423 Socket 478

Celeron, Pentium 4 rowspan="16" Template:No DDR 200/266
SDR 133
1 2 (DDR)
3 (SDR)
850 Tehama 82850 (MCH) SL4NG (A2)

SL5HA (A3)

November 2000 PC800/600 RDRAM 2
850E Tehama-E 82850E (MCH) SL64X (A3) ICH2/ICH4 May 2002 Socket 478 400/533 MT/s PC1066/800/600 RDRAM
845E Brookdale-E 82845E (MCH) SL66N

SL69S

ICH4 Celeron, Celeron D, Pentium 4 DDR 200/266 5.8 W
845G Brookdale-G 82845G (GMCH) SL66F (A1)

SL6PR (B1)

DDR 200/266
SDR 133
rowspan="10" Template:No Intel Extreme Graphics
AGP 4×
5.1 W (SDRAM),
5.7 W (DDR)<ref name="i82845gx_design" />
845GV Brookdale-GV 82845GV (GMCH) SL6NR (A1)

SL6PU (B1)

SL8DA

October 2002 Socket 478
LGA 775
DDR 200/266
SDR 133
Intel Extreme Graphics
no AGP slot
845GL Brookdale-GL 82845GL (GMCH) SL66G (A1)

SL6PT (B1)

May 2002 Socket 478 Celeron, Pentium 4 400 MT/s DDR 200/266
SDR 133
citation CitationClass=web

}}</ref>

845GE Brookdale-GE 82845GE (GMCH) SL6PS October 2002 Socket 478
LGA 775
Celeron, Celeron D, Pentium 4 400/533 MT/s DDR 200/266/333 Intel Extreme Graphics
AGP 4×
6.3 W
845PE Brookdale-PE 82845PE (MCH) SL6H5

SL6Q3

Socket 478 AGP 4× 5.6 W
848P Breeds Hill 82848P (MCH) SL77Y (A2)

SL7YG (A2)

ICH5/ICH5R August 2003 Socket 478
LGA 775
Pentium 4, Pentium 4 EE, Pentium D,
Celeron, Celeron D
400/533/800 MT/s DDR-400 AGP 8× 8.1 W
865P Springdale-P 82865P SL6UY May 2003 Pentium 4, Celeron D 400/533 MT/s DDR-333 2 4 10.3 W
865PE Springdale-PE 82865PE SL722 (A2)

SL7YE (A2)

Pentium 4, Pentium 4 EE, Pentium D,
Pentium Extreme Edition, Celeron,
Celeron D
400/533/800 MT/s DDR-400 AGP 8× 11.3 W
865G Springdale 82865G (GMCH) SL99Y

SL743 (A2)

Intel Extreme Graphics 2
AGP 8×
12.9 W
865GV Springdale-GV 82865GV (GMCH) SL77X (A2)

SL7YF (A2)

September 2003 Intel Extreme Graphics 2
no AGP slot
citation CitationClass=web

}}</ref>|| Canterwood || 82875P (MCH)

SL744 (A2)

SL8DB

ICH5/ICH5R/6300ESB April 2003 Socket 478
Socket 604
LGA 775
Pentium 4, Pentium 4 EE, Pentium D,
Pentium Extreme Edition, Celeron,
Celeron D, Xeon
rowspan="5" Template:Yes AGP 8× 12.1 W
citation CitationClass=web

}}</ref>|| Granite Bay || E7205 (MCH)

SL65P (B0)

SL6TU

ICH4 November 2002 Socket 478 Pentium 4 400/533 MT/s DDR-200/266
citation CitationClass=web

}}</ref>|| Plumas || rowspan="2" | E7500 (MCH)

SL64H

SL69U

ICH3-S February 2002 Socket 604 Xeon 400 MT/s rowspan="3" Template:Yes DDR-200 16 PCI-X
citation CitationClass=web

}}</ref>|| Plumas 533

December 2002 Socket 604
Socket 479
citation CitationClass=web

}}</ref> || rowspan="2" | 400/533 MT/s

DDR-200/266
citation CitationClass=web

}}</ref>|| Placer || E7505 (MCH)

SL65N

SL6TU

ICH4 November 2002 Socket 604 Xeon AGP 8×
citation CitationClass=web

}}</ref><ref name="e7221_pentium_e">{{#invoke:citation/CS1|citation

CitationClass=web

}}</ref> || Copper River || E7221 (MCH)

SL7YQ ICH6/ICH6R September 2004 LGA 775 Pentium 4, Pentium 4 HT 533/800 MT/s rowspan="2" Template:No DDR 333/400
DDR2 400/533
4 Template:Yes
unbuffered only
• Integrated graphics engine (SVGA)
PCI Express ×8 (1.0a), or
• PCI-X (with PCIe bridge)
not specifically dedicated to graphics
citation CitationClass=web

}}</ref> || Mukilteo || E7230 (MCH)

SL8kJ

SL8KK

ICH7/ICH7R July 2005 LGA 775 Pentium D,
Pentium 4, Pentium 4 HT, Pentium 4 EE,
Celeron D
533/800/1066 MT/s DDR2 400/533/667 8 Template:Yes
unbuffered only
PCI Express ×8 (1.0a), or
• PCI-X (with PCIe bridge)
not specifically dedicated to graphics

Summary:

  • 845 (Brookdale)
    • two distinct versions 845 MCH for SDR and 845 MCH for DDR<ref>{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

  • 875P (Canterwood)
  • 865PE (Springdale)
    • 875P without PAT, though it was possible to enable PAT in some early revisions. Also lacks ECC Memory support.
    • Sub-versions:
      • 865P - Similar to 865PE, but supports only 400/533 MHz bus and 333 MHz memory.
      • 848P - Single memory channel version of 865PE.
  • 865G (Springdale-G)
    • 865PE with integrated graphics (Intel Extreme Graphics 2). PAT never supported in any revisions.
    • Sub-versions:
      • 865GV - 865G without external AGP slot.
  • E7221 (Copper River)
    • Designed for Pentium 4-based server.
    • Supports only one physical processor.
    • A basic SVGA controller is integrated for analog video.
    • One PCI-X slot can be bridged to the PCI-e ×8 using the Intel 6702PXH 64-bit PCI Hub.
  • E7230 (Mukilteo)
    • Similar to the Intel 3000 MCH, but mainly designed for Pentium D-based server.
    • Supports only one physical processor.
    • DDR2-667 4-4-4 is not supported.<ref name="e7230_pentium_d" />
    • No integrated graphics.
    • One PCI-X slot can be bridged to the PCI-e ×8 using Intel 6700PXH 64-bit PCI Hub/Intel 6702PXH 64-bit PCI Hub.

Pentium 4-M/Pentium M/Celeron M mobile chipsetsEdit

Chipset Code name Part numbers sSpec Number South bridge Release date Processors FSB SMP Memory types Max. memory Parity/ECC PCI Type Graphics TDP
845MZ Brookdale-MZ 82845 (MCH) SL64T ICH3-M March 2002 Mobile Celeron, Pentium 4-M 400 MT/s rowspan="10" Template:No DDR 200 1 GB rowspan="10" Template:No v2.2/33 MHz AGP 4×
845MP Brookdale-M SL66J DDR 200/266
852GM Montara-GM 82852GM (GMCH) SL6ZK

SL7VP

ICH4-M Q2, '04 Pentium 4-M, Celeron, Celeron M Integrated 32-bit 3D Core @ 133 MHz 3.2 W
852GMV 82852GMV (GMCH)
852PM 82852PM (MCH) SL72J

SL7VP

Pentium 4-M, Celeron, Celeron D 400 MT/s

533 MT/s

DDR 200/266/333 2 GB AGP 1x/2×/4× 5.7 W
852GME 82852GME (GMCH) SL72K

SL8D7

Q4, '03 Integrated Extreme Graphics 2 graphics core
854<ref>[1] Template:Webarchive Intel 854 Product Information</ref> 82854 (GMCH) SL794 March 2005 Celeron M ULV 400 MT/s DDR 266/333
855GM Montara-GM 82855GM (GMCH) SL6WW

SL7VL

March 2003 Pentium M, Celeron M DDR 200/266 3.2 W
855GME 82855GME (MCH) SL72L

SL7VN

DDR 200/266/333 4.3 W
855PM Odem 82855PM (MCH) SL6TJ (A3)

SL752 (B1)

AGP 2×/4× 5.7 W

Southbridge 8xx chipsetsEdit

Template:Main article

Chipset Part Number sSpec Number ATA SATA RAID Level USB PCI
ICH 82801AA SL38R

SL3MZ

SL47Z

UDMA 66/33 rowspan="9" Template:No rowspan="10" Template:No 1.1, 2 ports Rev 2.2, 6 slots
ICH0 82801AB SL38P

SL3N2 (B1)

UDMA 33 Rev 2.2, 4 slots
ICH2-M 82801BAM citation CitationClass=web

}}</ref>

SL4HN (B1)<ref name=298242-027 />

SL4R6 (B2)<ref name=298242-027 />

UDMA 100/66/33 Rev 2.2, 2 slots
ICH2 82801BA SL45H (B0)<ref name=298242-027 />

SL5FC (B0)<ref name=298242-027 />

SL4HM (B1)<ref name=298242-027 />

SL4YG (B1’)<ref name=298242-027 />

SL59Z (B4)<ref name=298242-027 />

SL5WK (B5)<ref name=298242-027 />

SL7UU (B5)<ref name=105975-01>{{#invoke:citation/CS1|citation

CitationClass=web

}}</ref>

SL5PN (C0)<ref name=298242-027 />

1.1, 4 ports Rev 2.2, 6 slots
ICH3-M 82801CAM SL5LF (B0)

SL5YP

1.1, 2 ports Rev 2.2, 2 slots
ICH3-S 82801CA SL632

SL8AN (B2)

1.1, 6 ports Rev 2.2, 6 slots
ICH4-M 82801DBM SL6DN

SL7VK (B2)

2.0, 4 ports Rev 2.2, 3 slots
ICH4 82801DB SL66K (A1)

SL6DM (B0)

SL8DE

2.0, 6 ports Rev 2.2, 6 slots
ICH5-M 82801EBM 2.0, 4 ports Rev 2.3, 4 slots
ICH5 82801EB SL6TN (A2)

SL73Z (A3)

SL7YC

rowspan="3" Template:Yes 2.0, 8 ports Rev 2.3, 6 slots
ICH5R 82801ER SL6ZD

SL73D (A3)

SL742 (A3)

rowspan="2" Template:Yes
6300ESB 6300ESB SL7XJ 2.0, 4 ports Rev 2.2 4 PCI slots,
Rev 1.0 2 PCI-X slots + 2 PCI-X devices

9xx chipsets and 3/4 Series chipsetsEdit

Pentium 4/Pentium D/Pentium XE chipsetsEdit

All chipsets listed in the table below:

  • Do not support SMP
  • Support (-R and -DH) variants for South Bridges
Chipset Code Name Part numbers sSpec Number South Bridge Release Date Supported Processors FSB [MT/s] Memory Parity / ECC Graphics TDP [W]
types max. [GB] PCIe integrated core
910GL Grantsdale-GL 82910GL (GMCH) SL7W4 (B1)

SL8AR (C2)

SL8BV (C2)

ICH6/ICH6R September 2004 Pentium 4, Celeron, Celeron D 533 DDR 333/400 2 rowspan="6" Template:No rowspan="2" Template:N/a GMA 900 16.3
915GL 82915GL (GMCH) SL8CK (C2)

SL8CL

SL8DC (C2)

March 2005 Pentium 4, Celeron D 533/800 4
915PL Grantsdale-PL 82915PL (MCH) SL8D6 (C2)

SL8DD (C2)

2 ×16 rowspan="2" Template:N/a
915P Grantsdale 82915P (MCH) SL7LY (B1)

SL8AS (C2)

SL8BW (C2)

June 2004 DDR 333/400,
DDR2 400/533
4
915G Grantsdale-G 82915G (GMCH) SL7LX (B1)

SL8AT (C2)

SL8BU (C2)

GMA 900
915GV Grantsdale-GV 82915GV (GMCH) SL7W5 (B1)

SL8AU (C2)

SL8BT (C2)

Template:N/a
925X Alderwood 82925X (MCH) SL7LZ

SL7RC

Pentium 4, Pentium 4 XE 800 DDR2 400/533 4[*] rowspan="2" Template:Yes ×16 rowspan="4" Template:N/a 12.3
925XE Alderwood-XE 82925XE (MCH) SL84Z November 2004 800/1066 13.3
945PL Lakeport-PL 82945PL (MCH) SL8V4 (A2)

SL93C (A1)

ICH7 March 2006 Pentium 4, Pentium D, Celeron D,
(Core 2)[1]
533/800 2[*] rowspan="3" Template:No 15.2
945P Lakeport 82945P (MCH) SL8FV (A1)

SL8HT (A2)

ICH7/ICH7R May 2005 Pentium 4, Pentium D, Celeron D,
(Core 2)[1]
533/800/1066 DDR2 400/533/667 4[*]
945G Lakeport-G 82945G (GMCH) SL8FU GMA 950 22.2
955X Lakeport-X 82955X (MCH) SL8FW April 2005 Pentium 4, Pentium 4 XE, Pentium D, Pentium XE 800/1066 DDR2 533/667 8 Template:Yes Template:N/a 13.5

[*] Remapping of PCIE/APIC memory ranges not supported,<ref name="intel 945 express datasheet">Mobile Intel 945 Express Chipset Family Datasheet Template:Webarchive, section 9.2</ref><ref name="intel 925x 925xe datasheet">Intel 925X/925XE Datasheet Template:Webarchive, section 9.2</ref> some physical memory might not be accessible (e.g. limited to 3.5 GB or similar).

[1] Some later revisions of motherboards based on 945P,945G and 945PL chipset usually supports some Core 2 processors (with later BIOSes). Core 2 Quad is not supported. Only Core 2 Duo, Pentium Dual-Core, and Core2 based Celerons.

Summary:

  • 915P (Grantsdale)
    • Supports Pentium 4 on an 800 MT/s bus. Uses DDR memory up to 400 MHz, or DDR2 at 533 MHz. Replaces AGP and CSA with PCI Express, and also supports "Matrix RAID", a RAID mode designed to allow the usage of RAID levels 0 and 1 simultaneously with two hard drives. (Normally RAID1+0 would have required four hard drives)
    • Sub-versions:
      • 915PL - Cut-down version of 915P with no support for DDR2 and only supporting 2 GB of memory.
  • 915G (Grantsdale-G)
    • 915P with an integrated GMA 900. This core contains Pixel Shader version 2.0 only, it does not contain Vertex Shaders nor does it feature Transform & Lighting (T&L) capabilities and therefore is not Direct X 8.1 or 9.0 compliant.
    • Sub-versions:
      • 915GL - Same feature reductions as 915PL, but supports 4 GB of memory. No support for external graphics cards.
      • 915GV - Same as 915G, but has no way of adding an external graphics card.
      • 910GL - No support for external graphics cards or 800 MT/s bus.
  • 925X (Alderwood)
    • Higher end version of 915. Supports another PAT-like mode and ECC memory, and exclusively uses DDR-II RAM.
    • Sub-versions:
      • 925XE - Supports a 1066 MT/s bus.
  • 945P (Lakeport)
    • Update on 915P, with support for Serial ATA II, RAID mode 5, an improved memory controller with support for DDR-II at 667 MHz and additional PCI Express lanes. Support for DDR-I is dropped. Formal dual-core support was added to this chipset.
    • Sub-versions:
      • 945PL - No support for 1066 MT/s bus, only supports 2 GB of memory.
  • 945G (Lakeport-G)
    • A version of the 945P that has a GMA 950 integrated, supports a 1066 MT/s bus.
    • Sub-versions:
      • 945GC - Same feature reductions as 945PL but with an integrated GMA 950.
      • 945GZ - Same as 945GC but only supports DDR2 memory at 400/533 MT/s. No support for external graphics cards (some boards, like Asus P5GZ-MX, support through ICH7 on PCIe ×16 @4 lanes mode).
  • 955X (Lakeport)
    • Update for 925X, with additional features of "Lakeport" (e.g., PAT features and ECC memory), and uses DDR2.

Pentium M/Celeron M mobile chipsetsEdit

Chipset Code Name Part numbers sSpec Number South Bridge Release Date Supported Processors FSB Memory Types Max. Memory Parity/ECC Graphics TDP
910GML Alviso-GM 82910GML (GMCH) SL89H

SL8AE

SL8DX

SL8G5 (C2)

SL8G8 (C2)

ICH6-M January 2005 Celeron M 400 MT/s DDR 333/400, DDR2 400 2 GB rowspan="4" Template:No Integrated GMA 900 6 W
915GMS 82915GMS (GMCH) SL8B6

SL8B7

SL8G4 (C2)

SL8G9 (C2)

Pentium M, Celeron M DDR2 400 4.8 W
915GM 82915GM (GMCH) SL87G

SL89G

SL8DY

SL8G2 (C2)

SL8G6 (C2)

400/533 MT/s DDR 333, DDR2 400/533 6 W
915PM Alviso 82915PM (MCH) SL8B4

SL8B5

SL8BR

SL8CS

SL8G3 (C2)

SL8G7 (C2)

PCI Express ×16 5.5 W

Core/Core 2 mobile chipsetsEdit

Chipset Code name Part numbers sSpec Number South bridge Release date Processors supported (official) FSB (MT/s) Memory Graphics TDP [W]
types max. [GB] graphics core 3D Render
940GML Calistoga 82940GML (GMCH) SL8Z5 ICH7-M January 2006 Celeron M 533 DDR2 400/533 2 Integrated GMA 950 Max. 166 MHz 7
943GML 82943GML (GMCH) Celeron M, Core Solo, Pentium Dual-CoreTemplate:Efn Max. 200 MHz
945GSE 82945GSE (GMCH) SLB2R Q1'06 Intel Atom 533/667 Max. 166 MHz 6
945GMS 82945GMS (GMCH) SL8TC January 2006 Core 2 Duo, Core Duo, Pentium Dual-Core, Core Solo, Celeron M 7
945GM/E 82945GM/E (GMCH) SL8Z2 ICH7-M/ICH7-M DH DDR2 400/533/667 4Template:Efn Max. 250 MHz 7
citation CitationClass=web

}}</ref>

82945GT (GMCH) SL8Z6 Max. 400 MHz
945PM 82945PM (MCH) SL8Z4 PCI Express ×16

Core 2 chipsetsEdit

All Core 2 chipsets support the Pentium Dual-Core and Celeron processors based on the Core architecture. Support for all NetBurst based processors was officially dropped starting with the Bearlake chipset family.<ref name="3series">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> However, some motherboards still support the older processors.<ref name="p35">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

Chipset Code Name Part numbers sSpec Number South Bridge Release Date Processors Lithography VT-d support<ref>{{#invoke:citation/CS1|citation CitationClass=web

}}</ref>

FSB

(MT/)

Memory Parity/ECC PCIe iGraphics
types max.
citation CitationClass=web

}}</ref> || Lakeport-GC || 82945GC (MCH)

SL9ZC (A2)

SLA9C (A2)

SLB86 (A2)

citation CitationClass=web

}}</ref> || May 2005<ref name="945GC">{{#invoke:citation/CS1|citation

CitationClass=web

}}</ref>|| Pentium 4, Pentium D, Celeron D, Core 2 Duo, Pentium Dual-Core, Atom || rowspan=9 | 130 nm || rowspan="15" Template:No || rowspan="4" | 533/800 (last rev.1066)|| DDR2 400/533/667 || 2 GB (some boards supports 4 GB shrunk to 3.27 GB) [*] || rowspan="8" Template:No || 1x16 || rowspan="2" | GMA 950

945GZ Lakeport-GZ 82945GZ (GMCH) SL927 (A2) ICH7 June 2005 Pentium 4, Pentium D, Celeron D, Core 2 Duo, Pentium Dual-Core DDR2 400/533 citation CitationClass=web

}}</ref> || some motherboards have ×16 @×4 from ICH7<ref>{{#invoke:citation/CS1|citation

CitationClass=web

}}</ref>

946PL Lakeport-PL 82946PL (MCH) SL9NV

SL9QY

ICH7/ICH7R July 2006 DDR2 533/667 4 GB ×16 Template:N/a
946GZ Lakeport-GZ 82946GZ (GMCH) SL9NV

SL9R4

GMA 3000
P965 Broadwater(P) 82P965 (MCH) SL9NU

SL9QX

ICH8/ICH8R/ICH8-DH June 2006 Pentium Dual-Core, Core 2 Quad, Core 2 Duo 533/800/1066 DDR2 533/667/800 8 GB ×16, ×4 Template:N/a
G965 Broadwater(GC) 82G965 (GMCH) SL9P2

SL9R5

Pentium Dual-Core, Core 2 Duo ×16 GMA X3000
Q965 Broadwater(G) 82Q965 (GMCH) SL9NW

SL9QZ

GMA 3000
Q963 Broadwater(G) 82Q963 (GMCH) SL9R2 Template:No
975X Glenwood citation CitationClass=web

}}</ref>

SL8YS ICH7/ICH7R/ICH7-DH November 2005 Pentium 4, Pentium 4 EE, Pentium D, Pentium XE, (Celeron D, Core 2 Quad, Core 2 Duo, Pentium Dual-Core)2 533/800/10662 DDR2 533/667/8003 Template:Yes 1x161, 2×8 rowspan="2" Template:N/a
P31 Bearlake (P) 82P31 (MCH) SLAHX

SLASK (B0)

ICH7 August 2007 Pentium Dual-Core, Core 2 Duo, Core 2 Quad 90 nm 800/1066/1333
(P45 unofficial 1600)
DDR2 667/800 4 GB rowspan="15" Template:No 1×16 rev. 1.1
G31 Bearlake (G) 82G31 (GMCH) SLASJ (B0)

SLAJ3 (A2)

GMA 3100
G33 Bearlake (G+) 82G33 (GMCH) SLA9Q (A2) ICH9/ICH9R/ICH9-DH June 2007 DDR2 667/800
DDR3 800/1066
8 GB
4 GB
P35 Bearlake (P+) 82P35 (MCH) SLA9R (A2) 8 GB 1×16, 1x4 rev. 1.1 Template:N/a
G35 Bearlake 82G35 (GMCH) SLAJJ August 2007 DDR2 667/800 1×16 rev. 1.1 GMA X3500
Q33 Bearlake (QF) 82Q33 (GMCH) SLAEW (A2) ICH9/ICH9R June 2007 GMA 3100
Q35 Bearlake (Q) 82Q35 (GMCH) SLAEX ICH9/ICH9R/ICH9-DO Template:Yes4
G41 Eaglelake (G) 82G41 (GMCH) SLB8D

SLGQ3

ICH7 September 2008 Core 2 Duo, Core 2 Quad 65 nm rowspan="7" Template:No DDR2 667/800
DDR3 800/1066
4 GB
8 GB
GMA X4500
B43 Eaglelake (B) 82B43 (GMCH) SLGL7 (A3) ICH10D December 2008 16 GB 1×16 rev. 2.0 GMA 4500
P43 Eaglelake (P) 82P43 (MCH) SLB89 ICH10/ICH10R June 2008 8 GB
16 GB
rowspan="2" Template:N/a
P45 Eaglelake (P+) 82P45 (MCH) SLB7Z (A1)

SLB8C (A2)

1×16, 2×8 rev. 2.0
G43 Eaglelake (G) 82G43 (GMCH) SLB85 (A3)

SLGQ2 (A3)

1x16 rev. 2.0 GMA X4500
G45 Eaglelake (G+) 82G45 (GMCH) SLB84 GMA X4500HD
Q43 Eaglelake (Q) 82Q43 (GMCH) SLB88 (A3) ICH10/ICH10R/ICH10D August 2008 GMA 4500
Q45 Eaglelake (Q) 82Q45 (GMCH) SLB8A ICH10/ICH10R/ICH10-DO rowspan="3" Template:Yes4
X38 Bearlake (X) 82X38 (MCH) SLALJ (A1) ICH9/ICH9R/ICH9-DH September 2007<ref>Pancescu, Alexandru. Intel's X38 Express Chipset Is Ready Template:Webarchive, Softpedia News, August 16, 2007.</ref> Core 2 Duo, Core 2 Quad, Core 2 Extreme 90 nm DDR3 800/1066/1333
DDR2 667/800/1066
rowspan="2" Template:Partial 2×16 rev. 2.0 rowspan="2" Template:N/a
X48 82X48 (MCH) SLASF (A1) March 2008 800/1066/1333/1600

[*] Remapping of PCIE/APIC memory ranges not supported,<ref name="intel 945 express datasheet"/> some physical memory might not be accessible (e.g. limited to 3.5 GB or similar). Operational configuration is 4 ranks - 2× 2 GB dual rank modules or 4× 1 GB single rank modules - depends on number of motherboard DDR2 slots.

Summary:

  • 946PL (Lakeport)
    • Update on 945PL, supports 4 GB of memory.
  • 946GZ (Lakeport-G)
    • A version of 946PL with GMA 3000 graphics core.
  • P965 (Broadwater)
    • Update on 945P, no native PATA support, improved memory controller with support for DDR2 memory up to 800 MHz and official Core 2 Duo support.
  • G965 (BroadwaterG)
    • A version of P965 that has a GMA X3000 integrated graphics core.
  • Q965 (Broadwater)
    • Expected G965 intended for Intel's vPro office computing brand, with GMA 3000 graphics instead of GMA X3000 graphics. Supports an ADD2 card to add a second display.
    • Sub-versions:
      • Q963 - Q965 without an external graphics interface or support for ADD2.
  • 975X (Glenwood)
    • Update of 955, with support for ATI Crossfire Dual Graphics systems and 65 nm processors, including Core 2 Duo.
  • P35 (Bearlake)
    • The P35 chipset provides updated support for the new Core 2 Duo E6550, E6750, E6800, and E6850. Processors with a number ending in "50" have a 1333 MT/s FSB. Support for all NetBurst based processors is dropped with this chipset.<ref name="3series"/>
  • G33 (BearlakeG)
    • A version of P35 with a GMA 3100 integrated graphics core and uses an ICH9 South Bridge.
    • Sub-versions:
      • G35 - G33 with a GMA x3500 integrated graphics core and uses an ICH8 South Bridge, no DDR3 support.
  • Q35 (BearlakeG)
    • Expected G33 intended for Intel's vPro office computing brand, no DDR3 Support.
    • Sub-versions:
      • Q33 - Q35 without vPro support.
  • P31 (BearlakeG)
    • A version of P35 with an ICH7 South Bridge, supports only 4 GB of DDR2 memory and does not support DDR3 memory.
    • Operational configuration is 4 ranks - 2× 2 GB dual rank modules or 4 × 1 GB single rank modules - depends on number of motherboard DDR2 slots. 4GBs modules are not supported.
  • G31 (BearlakeG)
    • A version of P31 with a GMA 3100 integrated graphics core. It supports a 1333 MT/s FSB with Core 2 Duo processors, but Core 2 Quad processors are only supported up to 1066 MT/s.<ref>{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref>

  • G41 (EaglelakeG)
    • Update of G31 with a GMA X4500 integrated graphics core and DDR3 800/1066 support.
  • P45 (Eaglelake)
    • Update of P35, with PCIe 2.0 support, Hardware Virtualization, Extreme Memory Profile (XMP) and support for ATI Crossfire (x8+x8).
    • Sub-versions:
      • P43 - P45 without Crossfire support.
  • G45 (EaglelakeG)
    • A version of P45 that has a GMA X4500HD integrated graphics core and lacks Crossfire support.
    • Sub-versions:
      • G43 - Same feature reductions as P43, but with a GMA X4500 integrated graphics core.
  • Q45 (EaglelakeQ)
    • Expected G43 intended for Intel's vPro office computing brand. Also supports Hardware Virtualization Technology and Intel Trusted Platform Module 1.2 feature.
    • Sub-versions:
      • Q43 - Q45 without vPro support. Also lacks Intel Trusted Platform Module 1.2 support.
      • B43 - Q43 with an ICH10D South Bridge.

[1] The 975X chipset supports only ×16 PCI Express (electrically) in the top slot when the slot below it is unpopulated. Otherwise it and the lower slot (both attached to the Memory Controller Hub) operate at ×8 electrically.

[2] Only later revisions of the 975X chipset boards support Core 2 processors. See MSI 975X Platinum (MS-7246) rev 1.0 (first release), and MSI 975X Platinum Powerup revision (MS-7246) rev 2.1 (released autumn 2006) as example. source: https://web.archive.org/web/20210515170458/http://ixbtlabs.com/articles2/mainboard/msi-975x-platinum-powerup-edition-i975x.html
Officially 975X supports a maximum of 1066 MT/s FSB. Unofficially, third-party motherboards (Asus, Gigabyte) support certain 1333FSB 45 nm Core2 processors, usually with later BIOS updates.
As for Celeron and Celeron D support, some boards and revisions support it, some not. (see upper example, MSI Powerup Edition has reintroduced back Celeron support, probably due to later released Core2-based Celerons, which were often more powerful than higher clocked Netburst Pentiums 4.

[3] The 975X chipset technical specification shows only DDR2-533/667 memory support. Actual implementations of 975X do support DDR2 800.

[4] VT-d is inherently supported on these chipsets, but may not be enabled by individual OEMs. Always read the motherboard manual and check for BIOS updates. X38/X48 VT-d support is limited to certain Intel, Supermicro, DFI (LanParty) and Tyan boards. VT-d is broken or non existent on some boards until the BIOS is updated. Note that VT-d is a chipset Memory Controller Hub technology, not a processor feature, but this is complicated by later processor generations (Core i3/i5/i7) moving the MCH from the motherboard to the processor package, making only certain I series CPUs support VT-d.


Core 2 mobile chipsetsEdit

Chipset Code name Part numbers sSpec Number South bridge Release date Lithography Processors supported (official) FSB [MT/s] Memory Graphics TDP [W]
types. max. [GB] graphics core 3D Render
GL960 Crestline 82960GL (GMCH) SLA5V (C0) ICH8-M May 2007 ?? nm Celeron M, Pentium Dual-Core 533 DDR2 533/667 3/51 Integrated GMA X3100 Max. 400 MHz 13.5
GM965 82965GM (GMCH) SLA9F (C0) Core 2 Duo 533/667/800 4/82 Max. 500 MHz
PM965 82965PM (MCH) SLA5U (C0) PCIe ×16 8
GL40 Cantiga 82GL40 (GMCH) SLB95 (B3)

SLGGM (A1)

ICH9-M July 2008<ref>Template:Cite press release</ref> 65 nm Core 2 Duo, Celeron, Celeron M, Pentium Dual-Core 667/800 DDR2 667/800, DDR3 800/1066 4/82 Integrated GMA X4500MHD Max. 400 MHz 12
GS40 82GS40 (GMCH) SLGT8 (B3) Core 2 Duo, Celeron, Celeron M?, Pentium Dual-Core 4
GS45 82GS45 (GMCH) (For CULV) SLB92 (B3) Core 2 Solo, Core 2 Duo, Core 2 Extreme, Celeron M 800/1066 8 Max. 533 MHz 7/8/123
GM45 82GM45 (GMCH) SLB94 (B3)

SLGGN (A1)

Core 2 Duo, Core 2 Extreme, Celeron M 667/800/1066 12
PM45 82PM45 (MCH) SLB97 (B3)

SLGGN (A1)

Core 2 Duo, Core 2 Quad, Core 2 Extreme PCIe ×16 7
  • 1 Unofficially this chipset support 5 GB.
  • 2 Officially only 4 GB is supported. Unofficially many laptops with this chipset support 8 GB.
  • 3 Low power mode, HD playback mode and Full performance mode respectively.

Southbridge 9xx and 3/4 Series chipsetsEdit

Template:Main articleTemplate:None

Chipset Part
Number
sSpec Number Parallel ATA Serial ATA AHCI Support RAID Levels USB TDP
[W]
3.0 Gbit/s 1.5 Gbit/s v2.0
ICH6-M 82801FBM SL7W6 (B2)

SL89K (B2)

! rowspan="10" Template:Yes rowspan="4" Template:N/a 2 ports Template:Yes Template:No 4 ports 3.8
ICH6 82801FB SL7AG (B1)

SL7Y5 (B2)

SL89L (B2)

SL8BZ (C0)

4 ports Template:No Template:No 8 ports
ICH6R 82801FR SL79N (B1)

SL7W7 (B2)

SL89J (B2)

SL8C2 (C0)

Template:Yes Template:Yes 8 ports
ICH7-M 82801GBM SL8YB (B0) 2 ports Template:Yes Template:No 4 ports 3.3
ICH7-M DH 82801GHM SL8YR (B0) 4 ports rowspan="20" Template:N/a Template:Yes Template:Yes
ICH7 82801GB SL8FX (A1)

SLGSP

Template:No Template:No 8 ports
ICH7DH 82801GDH SL8UK (A1) Template:Yes Template:Yes
ICH7R 82801GR SL8FY (A1)

SL8KL (A1)

Template:Yes Template:Yes
ICH8M 82801HBM SLA5Q (B1)

SLB9A (B2)

SLJ4Y (B2)

3 ports Template:Yes Template:No 10 ports 2.4
ICH8M-E 82801HEM SLA5R (B1)

SLB9B (B2)

Template:Yes Template:Yes
ICH8 82801HB SL9MN (B0) rowspan="14" Template:No 4 ports Template:No Template:No 3.7
ICH8R 82801HR SL9MK (B0) 6 ports Template:Yes rowspan="3" Template:Yes
ICH8DH 82801HH SL9ML (B0) Template:Yes
ICH8DO 82801HO SL9MM (B0) Template:Yes
ICH9M 82801IBM SLB8Q (A3) 4 ports Template:Yes Template:No 8 ports 2.5
ICH9M-E 82801IEM SLB8P (A3) Template:Yes Template:Yes
ICH9 82801IB SLA9M (A2) Template:Yes Template:No 12 ports 4.3
ICH9R 82801IR SLA9N (A2)

SLAXE (A2)

6 ports Template:Yes rowspan="3" Template:Yes
ICH9DH 82801IH SLA9P (A2) Template:Yes
ICH9DO 82801IO SLAFD (A2) Template:Yes
ICH10 82801JB SLB8R (A0) Template:Yes rowspan="2" Template:No 4.5
ICH10D 82801JH SLG8T (B0) Template:Yes
ICH10R 82801JR SLB8S (A0) Template:Yes rowspan="2" Template:Yes
ICH10DO 82801JO Template:Yes

Template:Anchor5/6/7/8/9 Series chipsetsEdit

The Nehalem microarchitecture moves the memory controller into the processor. For high-end Nehalem processors, the X58 IOH acts as a bridge from the QPI to PCI Express peripherals and DMI to the ICH10 southbridge. For mainstream and lower-end Nehalem processors, the integrated memory controller (IMC) is an entire northbridge (some even having GPUs), and the PCH (Platform Controller Hub) acts as a southbridge.

LGA 1156Edit

Template:Main article Chipsets supporting LGA 1156 CPUs (Lynnfield and Clarkdale).

Not listed below is the 3450 chipset (see Xeon chipsets) which is compatible with Nehalem mainstream and high-end processors but does not claim core iX-compatibility. With either a Core i5 or i3 processor, the 3400-series chipsets enable the ECC functionality of unbuffered ECC memory.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Otherwise these chipsets do not enable unbuffered ECC functionality.

Chipset CodeTemplate:Brname sSpecTemplate:Brnumber PartTemplate:Brnumbers ReleaseTemplate:BrDate BusTemplate:BrInterface LinkTemplate:BrSpeed PCI Express lanes PCI SATA USB FDITemplate:Brsupport TDP
3 Gbit/s v2.0
H55 Ibex Peak SLGZX(B3) BD82H55 (PCH) Jan 2010 DMI 1.0 1 GB/s 6 PCIe 2.0 at 2.5 GT/s rowspan="4" Template:Yes 6 ports 12 ports Template:Yes 5.2 W
P55 SLH24 (B3),
SLGWV (B2)
BD82P55 (PCH) Sep 2009 8 PCIe 2.0 at 2.5 GT/s 14 ports Template:No 4.7 W
H57 SLGZL(B3) BD82H57 (PCH) Jan 2010 rowspan="2" Template:Yes 5.2 W
Q57 SLGZW(B3) BD82Q57 (PCH) 5.1 W

LGA 1155Edit

Template:See also Chipsets supporting LGA 1155 CPUs (Sandy Bridge and Ivy Bridge). The PCIe 2.0 lanes from the PCH ran at 5 GT/s in this series, unlike in the previous LGA 1156 chips.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

The Cougar Point Intel 6 series chipsets with stepping B2 were recalled due to a hardware bug that causes their 3 Gbit/s Serial ATA to degrade over time until they become unusable. Stepping B3 of the Intel 6 series chipsets will have the fix for this. The Z68 chipset which supports CPU overclocking and use of the integrated graphics does not have this hardware bug, however all other ones with B2 did.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The Z68 also added support for transparently caching hard disk data on to solid-state drives (up to 64 GB), a technology called Smart Response Technology.<ref>Intel Smart Response Technology: SSD Caching on Z68 Tested Template:Webarchive, PC Perspective</ref>

Chipset CodeTemplate:Brname sSpecTemplate:Brnumber PartTemplate:Brnumbers ReleaseTemplate:Brdate BusTemplate:Brinterface LinkTemplate:Brspeed PCI ExpressTemplate:Brlanes PCI SATA USB FDITemplate:Brsupport TDP
6 Gbit/s 3 Gbit/s v3.2 Gen 1x1 v2.0
H611 Cougar Point SLH83(B2)
SLJ4B(B3)
BD82H61 (PCH) February 20, 2011 DMI 2.0 2 GB/s 6 PCIe 2.0 Template:No Template:No 4 ports rowspan="7" Template:No 10 ports rowspan="3" Template:Yes 6.1 W
B651 SLH98(B2)
SLJ4A(B3)
BD82B65 (PCH) February 25, 2011 8 PCIe 2.0 rowspan="2" Template:Yes 1 port 5 ports 12 ports
Q651 SLH99(B2)
SLJ4E(B3)
BD82Q65 (PCH) Q2 2011 14 ports
P671 SLH84(B2) (Recalled)
SLJ4C (B3)
BD82P67 (PCH) January 9, 2011 rowspan="2" Template:No 2 ports 4 ports Template:No
H671 SLH82(B2) (Recalled)
SLJ49 (B3)
BD82H67 (PCH) rowspan="9" Template:Yes
Q671 SLH85(B2)
SLJ4D(B3)
BD82Q67 (PCH) February 20, 2011 Template:Yes
Z681 SLJ4F(B3) BD82Z68 (PCH) May 11, 2011 Template:No
B752 Panther Point SLJ85(C1) BD82B75 (PCH) May 13, 2012 rowspan="2" Template:Yes 1 port 5 ports 4 ports 8 ports 6.7 W
Q752 SLJ84(C1) BD82Q75 (PCH) 10 ports
Z752 SLJ87(C1) BD82Z75 (PCH) April 8, 2012 rowspan="2" Template:No 2 ports 4 ports
H772 SLJ88(C1) BD82H77 (PCH)
Q772 SLJ83(C1) BD82Q77 (PCH) May 13, 2012 Template:Yes
Z772 SLJC7(C1) BD82Z77 (PCH) April 8, 2012 Template:No
  • 1 For Sandy Bridge mainstream desktop and business platforms. Sandy Bridge CPUs provide 16 PCIe 2.0 lanes for direct GPU connectivity.
  • 2 For Ivy Bridge mainstream desktop platform. Ivy Bridge CPUs provide 16 PCIe 3.0 lanes for direct GPU connectivity and additional 4 PCIe 2.0 lanes.<ref>{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref>

LGA 1150Edit

Template:See also Chipsets that support LGA 1150 CPUs are listed below. Haswell and Haswell Refresh CPUs are supported by all listed chipsets; however, a BIOS update is usually required for 8-Series Lynx Point motherboards to support Haswell Refresh CPUs.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Broadwell CPUs are supported only by 9-Series chipsets, which are usually referred to as Wildcat Point.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

The C1 stepping of the Lynx Point chipset contains a bugTemplate:Snda system could lose connectivity with USB devices plugged into USB 3.0 ports provided by the chipset if the system enters the S3 sleep mode.<ref>Template:Cite news</ref>

Chipset Code

name

sSpec

number

Part

numbers

Release

date

Bus

interface

Link

speed

PCI Express

lanes

VT-d

support

PCI SATA USB FDI

support

TDP PCIe M.2

support

6 Gbit/s 3 Gbit/s v3.2 Gen 1x1 v2.0
H81 Lynx Point SR13B(C1)
SR177(C2)
DH82H81 (PCH) June 2013 DMI 2.0 2 GB/s 6 PCIe 2.0 rowspan="3" Template:No rowspan="8" Template:No 2 ports 2 ports 2 ports 8 ports rowspan="8" Template:Yes 4.1 W rowspan="6" Template:No
B85 SR13C(C1)
SR178(C2)
DH82B85 (PCH) 8 PCIe 2.0 4 ports 4 ports
Q85 SR138(C1)
SR174(C2)
DH82Q85 (PCH) 6 ports
Q87 SR137(C1)
SR173(C2)
SR19E(C2)
DH82Q87 (PCH) Template:Yes 6 ports rowspan="5" Template:No
H87 SR139(C1)
SR175(C2)
DH82H87 (PCH) rowspan="4" Template:No
Z87 SR13A(C1)
SR176(C2)
DH82Z87 (PCH)
Z97 Wildcat Point SR1JJ(A0) DH82Z97 (PCH) May 2014 rowspan="2" Template:Yes
H97 SR1JK(A0) DH82H97 (PCH)

LGA 1366, LGA 2011, and LGA 2011-v3Edit

Single socket chipsets supporting LGA 1366, LGA 2011, and LGA 2011-v3 CPUs. Please consult List of Intel Xeon chipsets for further, multi-socket, chipsets for these sockets.

Chipset Code name sSpec Number Part

numbers

Release date Socket Bus

interface

Link

speedTemplate:Efn

PCI Express lanes VT-d

support

PCI SATA USB FDI

support

TDP
6 Gbit/s 3 Gbit/s v3.2 Gen 1x1 v2.0
X58 (I/O hub)1 Tylersburg SLGBT (B2),
SLGMX (B3),
SLH3M (C2)
AC82X58 (IOH) November 2008 LGA 1366 QPI Up to 25.6 GB/s 36 PCIe 2.0 at 5 GT/s (IOH);
6 PCIe 1.1 (ICH)
rowspan="3" Template:Yes rowspan="2" Template:Yes Template:No 6 ports rowspan="2" Template:No 12 ports rowspan="3" Template:No 28.6 W2
X793 Patsburg citation CitationClass=web

}}</ref>
SLJN7 (C1)<ref>{{#invoke:citation/CS1|citation

CitationClass=web

}}</ref> || BD82X79 (PCH)<ref>{{#invoke:citation/CS1|citation

CitationClass=web

}}</ref> || November 14, 2011 || LGA 2011 || rowspan="2" | DMI 2.0 || rowspan="2" | 32 GB/s || rowspan="2" | 40 PCIe 3.0 || 2 ports || 4 ports || 14 ports || 7.8 W

X994 Wellsburg SLKDE (B1),
SLKM9 (B1)
DH82031PCH (PCH) August 29, 2014 LGA 2011-v3 Template:No 10 ports Template:No 6 ports 8 ports 6.5 W
  • 1 X58 South Bridge is ICH10/ICH10R.
  • 2 X58 TDP includes the X58 IOH TDP in addition to the ICH10/ICH10R TDP.
  • 3 For Sandy Bridge enthusiast desktop platform. Sandy Bridge CPUs will provide up to 40 PCIe 3.0 lanes for direct GPU connectivity and additional 4 PCIe 2.0 lanes. NOTE : This reference number 4 is on X79, which is a Sandy bridge -E, not Sandy Bridge, and PCIe 3.0 only is enabled when an Ivy Bridge-E CPU or Xeon E-5 series is used.
  • 4 For Haswell enthusiast desktop platform. Haswell CPUs will provide up to 40 PCIe 3.0 lanes for direct GPU connectivity and additional 4 PCIe 2.0 lanes.

LGA 2066Edit

Chipsets supporting LGA 2066 socket for Skylake-X processors and Kaby Lake-X processors.

The C621 Chipset also supports LGA 3647 socket for Skylake-SP as well as Cascade Lake-W and Cascade Lake-SP processors.

Chipset Code

name

sSpec

number

Part numbers Release Date Bus

interface

Link

speedTemplate:Efn

PCI Express lanes SATA SATAe PCIe

M.2

QAT USB ports TDP
6 Gbit/s v3.0 v2.0
X299 Basin Falls SR2Z2(A0) GL82X299 May 30, 2017 DMI 3.0

32 GB/s

16 PCIe 3.0 (for i5), 28-44 PCIe 3.0 (i7), 48 PCIe 3.0 (i9) Template:Dunno Template:Dunno No Up to 10 Up to 14 ? 6 W
C422 Kaby Lake SR2WG(A0) GL82C422 July 11, 2017 24 PCIe 3.0 ? 6 W
C621 Lewisburg SR36S(B1)
SR354(S0)
SR3HE(B2)
SR3HL(S1)
EY82C621x UPI 32 GB/s 48 PCIe 3.0 Up to 14 15 W
C622 SR36X(S0)
SR3HK(S1)
EY82C622 17 W
C624 SR36Y(S0)
SR3HM(S1)
EY82C624 19 W
C625 SR36W(B1)
SR3HJ(B2)
EY82C625 Yes 21 W
C626 SR36V(B1)
SR3HH(B2)
EY82C626 23 W
C627 SR36U(B1)
SR3HG(B2)
EY82C627 28.6 W
C628 SR36T(B1)
SR3HF(B2)
EY82C628 26.3 W

Dedicated mobile chipsetsEdit

All Core-i series mobile chipsets have an integrated south bridge.

Chipset Code

name

sSpec

number

Part

numbers

Release date Process

support

Bus

interface

Link

speed

PCI Express

lanes

VT-d

support

SATA USB FDI

support

TDP
6 Gbit/s 3 Gbit/s v3.2 Gen 1x1 v2.0
PM55 Ibex Peak-M SLGWN(B2),
SLH23(B3),
SLGWP
BD82PM55 (PCH) September 2009 45 nm, 32 nm DMI 1 GB/s 8 PCIe 2.0 rowspan="5" Template:Yes rowspan="5" Template:No 6 ports rowspan="11" Template:No 14 ports Template:No 3.5 W
HM55 SLGZS(B3) BD82HM55 (PCH) January 2010 6 PCIe 2.0 4 ports 12 ports rowspan="21" Template:Yes
HM57 SLGZR(B3) BD82HM57 (PCH) 8 PCIe 2.0 6 ports 14 ports
QM57 SLGZQ(B3) BD82QM57 (PCH)
QS57 SLGZV(B3) BD82QS57 (PCH) 3.4 W
HM65 Cougar Point-M SLH9D(B2) (Recalled)
SLJ4P(B3)
BD82HM65 (PCH) January 9, 2011 32 nm DMI 2.0 2 GB/s 8 PCIe 2.0 rowspan="3" Template:No 2 ports 4 ports 12 ports 3.9 W
HM67 SLH9C(B2) (Recalled)
SLJ4N(B3)
BD82HM67 (PCH) 14 ports
UM67 SLH9U(B2)
SLJ4L(B3)
BD82UM67 (PCH) February 20, 2011 3.4 W
QM67 SLH9B(B2)
SLJ4M(B3)
BD82QM67 (PCH) rowspan="2" Template:Yes 3.9 W
QS67 SLHAG(B2)
SLJ4K(B3)
BD82QS67 (PCH) 3.4 W
NM70 Panther Point-M SLJTA(C1) BD82NM70 (PCH) August 2012 22 nm 4 PCIe 2.0 Template:Dunno 1 port 3 ports 8 ports 4.1 W
HM70 SJTNV(C1) BD82HM70 (PCH) April 8, 2012 8 PCIe 2.0 rowspan="5" Template:No 4 ports 4 ports 6 ports
HM75 SLJ8F(C1) BD82HM75 (PCH) 2 ports Template:No 12 ports
HM76 SLJ8E(C1) BD82HM76 (PCH) 4 ports 8 ports
UM77 SLJ8D(C1) BD82UM77 (PCH) 4 PCIe 2.0 1 port 3 ports 6 ports 3.0 W
HM77 SLJ8C(C1) BD82HM77 (PCH) 8 PCIe 2.0 2 ports 4 ports 10 ports 4.1 W
QM77 SLJ8A(C1) BD82QM77 (PCH) rowspan="5" Template:Yes
QS77 SLJ8B(C1) BD82QS77 (PCH) 3.0 to 3.6 W
HM86 Lynx Point-M SR13J(C1)
SR17E(C2)
DH82HM86 (PCH) June 2013 4 ports 2 ports 5 ports 2.7 W
QM87 SR13G(C1)
SR17C(C2)
DH82QM87 (PCH) 6 ports 8 ports
HM87 SR13H(C1)
SR17D(C2)
DH82HM87 (PCH) 10 ports
HM97 Wildcat Point-M SR1JN(A0) DH82HM97 (PCH) May 2014 rowspan="1" Template:Dunno

On-package mobile chipsetsEdit

Every 4th Generation Intel Core and 5th Generation Intel Core processor based on Mobile U-Processor and Y-Processor Lines has an on-package Platform Controller Hub.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

CPU on-package chipset Code name Release date Process support Bus interface Link speed PCI Express lanes VT-d support SATA USB FDI support TDP
6 Gbit/s 3 Gbit/s v3.2 Gen 1x1 v2.0
8 series low-power, premium Lynx Point-LP June 2013 22 nm OPI✕8 Template:Unknown 12 PCIe 2.0 Template:Yes Up to 3 Up to 4 Up to 4 8 Template:No Template:Unknown
citation CitationClass=web

}}</ref>

Wildcat Point-LP January 2015 ? DMI 2.0 rowspan="3" Template:Unknown 10 PCIe 2.0 rowspan="3" Template:Yes 2 Up to 4 8 rowspan="3" Template:Yes rowspan="3" Template:Unknown
9 series U-processor line, premium<ref name=":0" /> ? 12 PCIe 2.0 Up to 4
9 series Core M processor line, premium<ref name=":0" /> September 2014 ? 10

100/200/300 Series chipsetsEdit

LGA 1151 rev 1Edit

Template:See also The 100 Series chipsets (codenamed Sunrise Point), for Skylake processors using the LGA 1151 socket,<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> were released in the third quarter of 2015.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

The 200 Series chipsets (codenamed Union Point) were introduced along with Kaby Lake processors, which also use the LGA 1151 socket;<ref name="Anand_desktop">Template:Cite news</ref> these were released in the first quarter of 2017.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

Chipset Code
Name
sSpec
Number
Part
numbers
Release Date Bus
Interface
Link
Speed
PCI Express
lanes
Optane

Memory support

SATA SATAe PCIe

M.2

Wireless
MAC
USB ports TDP
6 Gbit/s v3.2 Gen 1x1 v3.2 Gen 2x1 Total
H110 Sunrise
Point
SR2CA(D1)
SR286
GL82H110
(PCH)
Sep. 27, 2015 DMI 2.0 2.0 GB/s 6 PCIe 2.0 rowspan="6" Template:No 4 Template:No rowspan="3" Template:No rowspan="11" Template:No Up to 4 rowspan="11" Template:No Up to 10 6 W
B150 SR2C7(D1)
SR283
GL82B150
(PCH)
Sep. 1, 2015 DMI 3.0 3.93 GB/s 8 PCIe 3.0 6 Up to 1 Up to 6 Up to 12
Q150 SR2C6(D1)
SR282
GL82Q150
(PCH)
H2 2015 10 PCIe 3.0 Up to 8 Up to 14
H170 SR2C8(D1)
SR284
GL82H170
(PCH)
Sep. 1, 2015 16 PCIe 3.0 Up to 2 Up to 2
Q170 SR2C5(D1)
SR281
GL82Q170
(PCH)
Oct. 2015 20 PCIe 3.0 Up to 3 Up to 3 Up to 10
Z170 SR2C9(D1)
SR285
GL82Z170
(PCH)
Aug. 2015
B250 Union
Point
SR2WC(A0) GL82B250 Jan. 3, 2017 12 PCIe 3.0 rowspan = 5 Template:Yes Up to 1 Up to 1 Up to 6 Up to 12
Q250 SR2WD(A0) GL82Q250 14 PCIe 3.0 Up to 8 Up to 14
H270 SR2WA(A0) GL82H270 20 PCIe 3.0 Up to 2 Up to 2
Q270 SR2WE(A0) GL82Q270 24 PCIe 3.0 Up to 3 Up to 3 Up to 10
Z270 SR2WB(A0) GL82Z270

LGA 1151 rev 2Edit

File:Intel B360 Cannon Point Chipset Die Shot.png
Intel B360 Cannon Point Chipset Die Shot

Template:See also While Coffee Lake shares the same socket as Skylake and Kaby Lake, this revision of LGA 1151 is electrically incompatible with 100 and 200 series CPUs.

The 300 Series chipsets were introduced along with Coffee Lake processors, which use the LGA 1151 socket; the enthusiast model was released in the last quarter of 2017,<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> the rest of the line was released in 2018.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>

Chipset Code
Name
sSpec
Number
Part
numbers
Release Date Bus
Interface
Link
Speed
PCI Express
lanes
Optane
Memory

support

SATA SATAe PCIe M.2 Wireless
MAC
USB ports TDP
6 Gbit/s v3.2 Gen 1x1 v3.2 Gen 2x1 Total
Z370 Cannon Point SR3MD(A0) GL82Z370 October 5, 2017 DMI 3.0 3.93 GB/s 24 PCIe 3.0 Template:Yes 6 up to 3 up to 3 Template:No Up to 10 rowspan=2 Template:No Up to 14 6 W
H310 SR409(B0)
SRCXT(B0)
SRCXY(B0)
? April 3, 2018 DMI 2.0 2.0 GB/s 6 PCIe 2.0 Template:No 4 Template:No Template:No WiFi 5 Up to 4 Up to 10
B360 SR408(B0) DMI 3.0 3.93 GB/s 12 PCIe 3.0 rowspan=5 Template:Yes 6 Up to 1 Up to 1 Up to 6 Up to 4 Up to 12
B365 Union Point SREVJ(A0) Dec. 14, 2018 20 PCIe 3.0 Up to 2 Up to 2 Template:No Up to 8 Template:No Up to 14
H370 Cannon Point SR405(B0) April 3, 2018 WiFi 5 Up to 4
Q370 SR404(B0) Q2 2018 24 PCIe 3.0 Up to 3 Up to 3 Up to 10 Up to 6
Z390 SR406(B0) FH82Z390 October 8, 2018

Xeon chipsetsEdit

C232 and C242 chipsets do not support CPU integrated GPUs, as they lack FDI support. Officially they support only Xeon processors, but some motherboards also support consumer processors (6/7th generation Core for C230 series, 8/9th generation Core for C240 series and its Pentium/Celeron derivatives).

Chipset Code

name

sSpec

number

Part numbers Release date Bus

interface

Link

speed

PCI Express

lanes

SATA SATAe PCIe

M.2

Wireless
MAC
USB ports TDP
6 Gbit/s v3.2 Gen 1x1 v3.2 Gen 2x1 Total
C232 Sunrise Point SR2CB(D1) GL82C232 (PCH) September 1, 2015 DMI 3.0 3.93 GB/s 8 PCIe 3.0 Up to 6 Up to 3 Up to 1 rowspan=3 Template:No Up to 6 rowspan=2 Template:No Up to 12 6 W
C236 SR2CC(D1) GL82C236 (PCH) 20 PCIe 3.0 Up to 8 Up to 3 Up to 10 Up to 14
C242 Coffee Lake SR40C(B0) FH82C242 November 2018 10 PCIe 3.0 Up to 6 ? Up to 1 Up to 6 Up to 2 Up to 12
C246 SR40A(B0) FH82C246 July 2018 24 PCIe 3.0 Up to 8 Up to 3 WiFi 5 Up to 10 Up to 6 Up to 14

Dedicated mobile chipsetsEdit

Chipset Code Name sSpec Number Part numbers Release Date Bus Interface Link Speed PCI Express lanes SATA SATAe PCIe M.2 Wireless
MAC
USB ports TDP
6 Gbit/s ports v3.2 v2.0
Gen 1x1 Gen 2x1
HM170 Sunrise
Point
SR2C4(D1)
SR27Z
GL82HM170 (PCH) September 1, 2015 DMI 3.0 3.93 GB/s 16 PCIe 3.0 Up to 4 rowspan="10" Template:Dunno Up to 2 rowspan="7" Template:No Up to 8 rowspan="7" Template:No Up to 14 2.6 W
QM170 SR2C3(D1)
SR27Y
GL82QM170 (PCH)
CM236 SR2CE(D1) GL82CM236 (PCH) 20 PCIe 3.0 Up to 8 Up to 3 Up to 10 3.67 W
QMS180 SR2NH(D1) GLQMS180 (PCH) ? ? ? ? ? ?
QMU185 ? ? ? ? ? ?
HM175 SR30W(D1) GL82HM175 (PCH) January 3, 2017 16 PCIe 3.0 Up to 4 Up to 2 Up to 8 2.6 W
QM175 SR30V(D1) GL82QM175 (PCH)
CM238 SR30U(D1) GL82CM238 (PCH) 20 PCIe 3.0 Up to 8 Up to 3 Up to 10 3.67 W
HM370 Coffee Lake SR40B(B0) FH82HM370 (PCH) Q2 2018 16 PCIe 3.0 Up to 4 Up to 2 WiFi 5 Up to 8 Up to 4 3 W
QM370 SR40D(B0) FH82QM370 (PCH) 20 PCIe 3.0 Up to 10 Up to 6
CM246 SR40E(B0) FH82CM246 (PCH) 24 PCIe 3.0 Up to 8 Up to 4

On-package mobile chipsetsEdit

CPU On-package Chipset Code Name Release Date Bus Interface Link SpeedTemplate:Efn PCI Express lanes SATA SATAe PCIe M.2 Wireless
MAC
USB ports TDP
6 Gbit/s ports v3.2 v2.0
Gen 1x1 Gen 2x1
100 series (Base-U) Skylake<ref>{{#invoke:citation/CS1|citation CitationClass=web

}}</ref>

September 2015 OPI x8 2GT/s and 4GT/s 10 PCIe 2.0 2 rowspan="3" Template:Unknown ? rowspan="3" Template:Unknown 4 rowspan="3" Template:No 8 rowspan="3" Template:Unknown
100 series (Premium-U) 12 PCIe 3.0 3 ? 6 10
100 series (Premium-Y) 10 PCIe 3.0 2 ? 6 6
Kaby Lake (Base-U) Kaby Lake<ref>{{#invoke:citation/CS1|citation CitationClass=web

}}</ref>

September 2016 OPI x8 2GT/s and 4GT/s 10 PCIe 2.0 2 rowspan="3" Template:Unknown ? rowspan="3" Template:Unknown 4 rowspan="3" Template:No 10 rowspan="3" Template:Unknown
Kaby Lake (Premium-U) 12 PCIe 3.0 3 ? 6 10
Kaby Lake (Premium-Y) 10 PCIe 3.0 2 ? 6 6
300 series (Premium-U) citation CitationClass=web

}}</ref>

April 2018 OPI x8 Up to 4GT/s 16 PCIe 3.0 3 Template:Unknown ? Template:Unknown Up to 6 Template:No 10 Template:Unknown

400/500 Series chipsetsEdit

LGA 1200Edit

Template:See also LGA 1200 is a CPU socket designed for Comet Lake and Rocket Lake desktop CPUs. Like its predecessors, LGA 1200 has the same number of pins its name would suggest: 1200. Under the hood, LGA 1200 is a modified version of LGA 1151, its predecessor. It features 49 additional protruding pins that are used to improve power delivery and provide support for eventual updates with I/O features.

Chipset Code
Name
sSpec
Number
Part
numbers
Release Date Bus
Interface
Link
Speed
PCI Express
lanes
Intel Optane
Memory
support
SATA SATAe PCIe M.2 Wireless
MAC
USB ports Rocket Lake support TDP
6 Gbit/s v2.0 v3.2
Gen 1x1 Gen 2x1 Gen 2x2
H410 Comet Lake SRH1D(A0) FH82H410 Q2 2020 DMI 3.0 ×4<ref name="RocketLake">{{#invoke:citation/CS1|citation CitationClass=web

}}</ref>
(3.93 GB/s) || 6 PCIe 3.0 || Template:No || 4 || rowspan="6" Template:No || rowspan="6" Template:Yes || rowspan="2" Template:No || Up to 10 || Up to 4 || Template:No || Template:No || rowspan="2" Template:No || rowspan="6" | 6 W

B460 SRH1C(A0) FH82B460 16 PCIe 3.0 Template:Yes 6 Up to 12 Up to 8 Template:No Template:No
H470 SRH14(A0) FH82H470 20 PCIe 3.0 Template:Yes WiFi 6 Up to 14 Up to 4 Template:No rowspan="4" Template:Yes
Q470 SRH1A(A0) FH82Q470 24 PCIe 3.0 Template:Yes Up to 10 Up to 6 Template:No
Z490 SRH13(A0) FH82Z490 Template:Yes Template:No
W480 SRH19(A0) FH82W480 Template:Yes 8 Up to 8 Template:No
H420E SRH8W(A0) FH82H420E 6 PCIe 3.0 rowspan="3" Template:Unknown 4 rowspan="3" Template:No rowspan="3" Template:Unknown rowspan="3" Template:No Up to 10 Up to 6 None None rowspan="3" Template:Unknown 6 W
Q470E SRJ7X(A0) FH82Q470E 24 PCIe 3.0 6 14 Up to 10 Up to 6 None
W480E SRJ7Y(A0) FH82W480E 8 Up to 8 None
H510 Rocket Lake SRKM2(B1) FH82H510 Q1 2021 ×4<ref name="RocketLake" />
(3.93 GB/s)
6 PCIe 3.0 Template:No 4 rowspan="5" Template:No rowspan="5" Template:Yes WiFi 6 Up to 10 Up to 4 Template:No Template:No rowspan="5" Template:Yes 6 W
B560 SRKM5(B1) FH82B560 12 PCIe 3.0 Template:Yes 6 Up to 12 Up to 6 Up to 4 Up to 2
H570 SRKM6(B1) FH82H570 ×8<ref name="RocketLake" />
(7.86 GB/s)
20 PCIe 3.0 Template:Yes Up to 14 Up to 8
Z590 SRKM3(B1) FH82Z590 24 PCIe 3.0 Template:Yes Up to 10 Up to 10 Up to 3
W580 SRKM7(B1) FH82W580 Template:Yes 8
  • Connection to the CPU will be reduced to DMI 3.0 ×4 if a Comet Lake CPU is installed. DMI 3.0 ×8 is only available with Rocket Lake CPUs.
  • Mainboards advertised as H410 and B460 with Rocket Lake support use other 400-series chipsets. (such as H470)<ref>{{#invoke:citation/CS1|citation

|CitationClass=web }}</ref>

Dedicated mobile and embedded chipsetsEdit

Chipset Code
Name
sSpec
Number
Part
numbers
Release Date Bus
Interface
Link
Speed
PCI Express
lanes
Intel Optane
Memory
support
SATA SATAe PCIe M.2 Wireless
MAC
USB ports TDP
6 Gbit/s v2.0 v3.2
Gen 1x1 Gen 2x1 Gen 2x2
HM470 Comet Lake SRJAU(A0) FH82HM470 Q2 2020 DMI 3.0 3.93 GB/s 16 PCIe 3.0 rowspan="3" Template:Yes 4 rowspan="3" Template:No rowspan="3" Template:Yes WiFi 6 Up to 14 Up to 8 Up to 4 rowspan="2" Template:Unknown 3 W
QM480 citation CitationClass=web

}}</ref>

FH82QM480 20 PCIe 3.0 Up to 10 Up to 6
WM490 SRH17(A0) FH82WM490 24 PCIe 3.0 8 rowspan="1" Template:No
HM570E Tiger Lake SRKLS(B1) FH82HM570E Q3 2021 DMI 3.0 3.93 GB/s 16 PCIe 3.0 rowspan="3" Template:Unknown 4 rowspan="6" Template:No rowspan="3" Template:Unknown rowspan="3" Template:No Up to 14 Up to 10 Up to 10 rowspan="5" Template:Unknown 2.9 W
QM580E SRKLT(B1) FH82QM580E 20 PCIe 3.0
RM590E SRKLR(B1) FH82RM590E 24 PCIe 3.0 8 3.4 W
HM570 SRKMA(B1) FH82HM570 Q2 2021 16 PCIe 3.0 rowspan="3" Template:Yes 4 rowspan="3" Template:Yes WiFi 6 Up to 8 Up to 8
QM580 SRKMC(B1) FH82QM580 20 PCIe 3.0 Up to 14 Up to 10 Up to 10
WM590 SRKMB(B1) FH82WM590 24 PCIe 3.0 8 rowspan="1" Template:No

On-package mobile chipsetsEdit

CPU On-package Chipset Code Name Release Date Bus Interface Link SpeedTemplate:Efn PCI Express lanes SATA SATAe PCIe M.2 Wireless
MAC
USB ports TDP
6 Gbit/s ports v3.2 v2.0
Gen 1x1 Gen 2x1
400 series (Mainstream/Base-U) Comet Lake<ref>{{#invoke:citation/CS1|citation CitationClass=web

}}</ref>

August 2019 OPI x8 Up to 4GT/s 12 PCIe 2.0 Up to 2 rowspan="2" Template:No rowspan="2" Template:Yes ? Up to 4 Template:No 8 rowspan="2" Template:Unknown
400 series (Premium-U) 16 PCIe 3.0 Up to 3 ? Up to 6 Up to 6 10
495 series (Premium-U) Ice Lake<ref>{{#invoke:citation/CS1|citation CitationClass=web

}}</ref>

August 2019 OPI x8 Up to 4GT/s 16 PCIe 3.0 Up to 3 rowspan="2" Template:No rowspan="2" Template:Yes ? Up to 6 Up to 6 10 rowspan="2" Template:Unknown
495 series (Premium-Y) 14 PCIe 3.0 Up to 2 ? 6
500 series (Premium-UP3) Tiger Lake<ref>{{#invoke:citation/CS1|citation CitationClass=web

}}</ref>

September 2020 OPI x8 Up to 4GT/s 12 PCIe 3.0 2 rowspan="2" Template:No rowspan="2" Template:Yes ? 4 4 10 rowspan="2" Template:Unknown
500 series (Premium-UP4) Up to 2GT/s 10 PCIe 3.0 Template:No ? 4 4 6

600/700 Series chipsetsEdit

LGA 1700Edit

Template:See also

Chipset Code
Name
sSpec
Number
Part
numbers
Release Date Bus
Interface
Link
Speed
PCI Express
lanes
Optane
Memory
support
SATA SATAe PCIe

M.2

Wireless
MAC
USB ports TDP
6 Gbit/s v2.0 v3.2
4.0 3.0 Gen 1x1 Gen 2x1 Gen 2x2
Z690 Alder Lake SRKZZ(B1) FH82Z690 Q4 2021 DMI 4.0 ✕8<ref name="AlderLake">{{#invoke:citation/CS1|citation CitationClass=web

}}</ref>
(15.76 GB/s)

12<ref name="HboxCES2022">{{#invoke:citation/CS1|citation CitationClass=web

}}</ref>

16<ref name="HboxCES2022"/> rowspan="5" Template:Yes 8 rowspan="6"Template:No rowspan="6" Template:Yes WiFi 6E 14 10 10 4 6 W
W680 SRL00(B1) FH82W680 Q2 2022
Q670 SRL01(B1) FH82Q670 Q1 2022 12<ref name="HboxCES2022"/> 8
H670 SRKZY(B1) FH82H670 8<ref name="HboxCES2022"/> 4<ref name="HboxCES2022"/> 2<ref name="HboxCES2022"/>
B660 SRKZX(B1) FH82B660 ✕4<ref name="HboxCES2022"/>
(7.88 GB/s)
6<ref name="HboxCES2022"/> 8<ref name="HboxCES2022"/> 4<ref name="HboxCES2022"/> 12<ref name="HboxCES2022"/> 6<ref name="HboxCES2022"/>
H610 SRKZW(B1) FH82H610 Template:No Template:No 10<ref name="HboxCES2022"/> 4<ref name="HboxCES2022"/> 2<ref name="HboxCES2022"/> Template:No
R680E SRL2S(B1) FH82R680E ✕8
(15.76 GB/s)
12 16 rowspan="3" Template:No 8 rowspan="3" Template:No rowspan="3" Template:Unknown WiFi 5 14 10 10 4
Q670E SRL2R(B1) FH82Q670E 12 8
H610E SRL2T(B1) FH82H610E ✕4
(7.88 GB/s)
Template:No 12 4 WiFi 6E 10 4 2 Template:No
Z790 Raptor Lake SRM8P(B1) FH82Z790 Q4 2022 DMI 4.0 ✕8
(15.76 GB/s)
20 8 rowspan="3" Template:Yes 8 rowspan="3" Template:No rowspan="3" Template:Yes WiFi 6E 14 10 5
H770 SRM8T(B1) FH82H770 Q1 2023 16 8 4 2
B760 SRM8V(B1) FH82B760 ✕4
(7.88 GB/s)
10 4 4 12 6

Dedicated mobile chipsetsEdit

Every 12th Gen and 13th Gen Intel Core-i mobile CPU excluding HX-series has an on-package Platform Controller Hub.

Chipset Code
Name
sSpec
Number
Part
numbers
Release Date Bus
Interface
Link
Speed
PCI Express lanes Optane
Memory
support
SATA SATAe PCIe M.2 Wireless
MAC
USB ports TDP
4.0 3.0 6 Gbit/s v2.0 v3.2
Gen 1x1 Gen 2x1 Gen 2x2
HM670 Alder Lake SRL2Y(B1) FH82HM670 Q2 2022 DMI 4.0 ✕8<ref name="AlderLake"/>
(15.76 GB/s)
Up to 16 Up to 12 rowspan="2" Template:Yes 8 rowspan="2" Template:No rowspan="2" Template:Yes WiFi 6E Up to 14 Up to 10 Up to 4 3.7 W
WM690 SRL2Z(B1) FH82WM690
HM770 Raptor Lake SRM8M(B1) FH82HM770 January 3, 2023 28 including PCIe 3.0 rowspan="2" Template:Unknown rowspan="2" Template:No rowspan="2" Template:Yes
WM790 SRM8N(B1) FH82WM790

On-package mobile chipsetsEdit

CPU On-package Chipset Code Name Release Date Bus Interface Link
Speed
PCI Express lanes SATA SATAe PCIe M.2 Wireless
MAC
USB ports TDP
4.0 3.0 6 Gbit/s ports v3.2 v2.0
Gen 1x1 Gen 2x1
citation CitationClass=web

}}</ref>

Alder Lake February 2022 OPI ✕8

(15.76 GB/s)

Template:No 12 Up to 2 Template:No Template:Yes WiFi 6 Up to 4 Up to 4 10 Template:Unknown
citation CitationClass=web

}}</ref>

Raptor Lake January 2023 Template:No Template:No Template:Yes Template:Unknown

800 Series chipsetsEdit

LGA 1851Edit

Template:See also

Chipset Code
Name
sSpec
Number
Part
numbers
Release Date Bus
Interface
Link
Speed
PCI Express
lanes
Optane
Memory
support
SATA PCIe

M.2

Wireless
MAC
USB ports TDP
6 Gbit/s v2.0 v3.2
4.0 3.0 Gen 1x1 Gen 2x1 Gen 2x2
Z890 Arrow Lake SRPEZ(B0) FH82Z890 Q4 2024 DMI 4.0 ✕8
(15.76 GB/s)
24 rowspan="3" Template:N/A rowspan="3" Template:No 8 rowspan="3" Template:Yes WiFi 6E 14 10 10 5 6 W
B860 SRPEW(B0) FH82B860 Q1 2025 ✕4
(7.88 GB/s)
14 4 12 6 4 2
H810 SRPEV(B0) FH82H810 8 10 4 2 Template:No

See alsoEdit

Template:Div col

Template:Div col end

NotesEdit

Template:Notelist

ReferencesEdit

Template:Reflist

External linksEdit

Template:Sister project

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