Editing Xilinx (section)

===Zynq===
[[File:Adapteva_Parallella_DK02_-_Zynq_(15455173526).png|thumb|A Zynq-7000 (XC7Z010-CLG400) on a [[Adapteva]] Parallella [[single-board computer]]]]
The Zynq-7000 family of [[System on a chip|SoCs]] addresses high-end embedded-system applications, such as video surveillance, automotive-driver assistance, next-generation wireless, and factory automation.<ref name="EETimesMarch1"/><ref name="EmbeddedWorldMarch1"/><ref name="EDNMarch1">Mike Demler, EDN. "[http://www.edn.com/article/517141-Xilinx_integrates_dual_ARM_Cortex_A9_MPCore_with_28_nm_low_power_programmable_logic.php Xilinx integrates dual ARM Cortex-A9 MPCore with 28-nm, low-power programmable logic] {{webarchive|url=https://archive.today/20130122011606/http://www.edn.com/article/517141-Xilinx_integrates_dual_ARM_Cortex_A9_MPCore_with_28_nm_low_power_programmable_logic.php |date=2013-01-22 }}." March 1, 2011. Retrieved March 1, 2011.</ref> Zynq-7000 integrate a complete [[ARM Cortex-A9]] MPCore-processor-based 28&nbsp;nm system. The Zynq architecture differs from previous marriages of programmable logic and embedded processors by moving from an FPGA-centric platform to a processor-centric model.<ref name="EETimesMarch1"/><ref name="EmbeddedWorldMarch1"/><ref name="EDNMarch1"/> For software developers, Zynq-7000 appear the same as a standard, fully featured [[ARM architecture family|ARM]] processor-based [[System on a chip|system-on-chip (SoC)]], booting immediately at power-up and capable of running a variety of operating systems independently of the programmable logic.<ref name="EETimesMarch1"/><ref name="EmbeddedWorldMarch1"/><ref name="EDNMarch1"/> In 2013, Xilinx introduced the Zynq-7100, which integrates [[digital signal processing]] (DSP) to meet emerging programmable systems integration requirements of wireless, broadcast, medical and military applications.<ref>Clive Maxfield, EETimes. "[http://www.eetimes.com/electronics-products/electronic-product-reviews/fpga-pld-products/4410302/Xilinx-unveils-new-Zynq-7100-All-Programmable-SoCs Xilinx unveils new Zynq-7100 All Programmable SoCs] {{Webarchive|url=https://web.archive.org/web/20130326190106/http://www.eetimes.com/electronics-products/electronic-product-reviews/fpga-pld-products/4410302/Xilinx-unveils-new-Zynq-7100-All-Programmable-SoCs |date=2013-03-26 }}." Mar 20, 2013. Retrieved Jun 3, 2013.</ref>

The new Zynq-7000 product family posed a key challenge for system designers, because Xilinx ISE design software had not been developed to handle the capacity and complexity of designing with an FPGA with an ARM core.<ref name="EETimes25Apr2012"/><ref name="EDN15Jun2012"/> Xilinx's new [[Xilinx Vivado|Vivado Design Suite]] addressed this issue, because the software was developed for higher capacity FPGAs, and it included [[high level synthesis]] (HLS) functionality that allows engineers to compile the co-processors from a [[C (programming language)|C]]-based description.<ref name="EETimes25Apr2012"/><ref name=EDN15Jun2012/>

The [[AXIOM (camera)|AXIOM]],<ref>{{cite web |url=https://www.apertus.org/alpha_prototype |title=Axiom Alpha |access-date=2014-06-20 |archive-date=2014-07-02 |archive-url=https://web.archive.org/web/20140702114027/https://www.apertus.org/alpha_prototype |url-status=live }}</ref> the world's first [[digital cinema camera]] that is [[open source hardware]], contains a Zynq-7000.<ref>{{cite web |url=https://forums.xilinx.com/t5/Xcell-Daily-Blog/Zynq-based-Axiom-Alpha-open-4K-cine-camera-proto-debuts-in/ba-p/430066 |title=Zynq-based Axiom Alpha open 4K cine camera proto debuts in Vienna hackerspace |date=2014-03-20 |access-date=2014-06-20 |archive-date=2014-08-13 |archive-url=https://web.archive.org/web/20140813105309/http://forums.xilinx.com/t5/Xcell-Daily-Blog/Zynq-based-Axiom-Alpha-open-4K-cine-camera-proto-debuts-in/ba-p/430066 |url-status=live }}</ref>