Xilinx
Template:Short description {{#invoke:Infobox|infobox}}Template:Template otherTemplate:Main other{{#invoke:Check for clobbered parameters|check|nested=1|template=Infobox company|cat=Template:Main other|name; company_name|logo; company_logo|logo_alt; alt|trade_name; trading_name|former_names; former_name|type; company_type|predecessors; predecessor|successors; successor|foundation; founded|founders; founder|defunct; dissolved|hq_location; location|hq_location_city; location_city|hq_location_country; location_country|num_locations; locations|areas_served; area_served|net_income; profit|net_income_year; profit_year|owners; owner |homepage; website }}{{#invoke:Check for unknown parameters|check|unknown=Template:Main other|preview=Page using Template:Infobox company with unknown parameter "_VALUE_" | ignoreblank=y | alt | area_served | areas_served | assets | assets_year | aum | brands | company_logo | company_name | company_type | defunct | dissolved | divisions | embed | equity | equity_year | fate | footnotes | former_name | former_names | foundation | founded | founder | founders | genre | homepage | hq_location | hq_location_city | hq_location_country | incorporated | image | image_alt | image_caption | image_size | image_upright | income_year | industry | ISIN | key_people | location | location_city | location_country | locations | logo | logo_alt | logo_caption | logo_class | logo_size | logo_upright | members | members_year | module | name | native_name | native_name_lang | net_income | net_income_year | num_employees | num_employees_year | num_locations | num_locations_year | operating_income | owner | owners | parent | predecessor | predecessors | production | production_year | products | profit | profit_year | rating | ratio | revenue | revenue_year | romanized_name | services | subsid | successor | successors | traded_as | trade_name | trading_name | type | website| qid | fetchwikidata | suppressfields | noicon | nocat | demo | categories }}
Xilinx, Inc. (Template:IPAc-en Template:Respell) was an American technology and semiconductor company that primarily supplied programmable logic devices. The company is renowned for inventing the first commercially viable field-programmable gate array (FPGA). It also pioneered the first fabless manufacturing model.<ref name=":0b">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref name="six">Jonathan Cassell, iSuppli. "A Forgettable Year for Memory Chip Makers: iSuppli releases preliminary 2008 semiconductor rankings Template:Webarchive." December 1, 2008. Retrieved January 15, 2009.</ref><ref name="eleven">John Edwards, EDN. "No room for Second Place." June 1, 2006. Retrieved January 15, 2009.</ref>
Xilinx was co-founded by Ross Freeman, Bernard Vonderschmitt, and James V Barnett II in 1984. The company went public on the Nasdaq in 1990.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> In October 2020, AMD announced its acquisition of Xilinx, which was completed on February 14, 2022, through an all-stock transaction valued at approximately $60 billion.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>Template:Cite news</ref> Xilinx remained a wholly owned subsidiary of AMD until the brand was phased out in June 2023, with Xilinx's product lines now branded under AMD.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
Company overviewEdit
Xilinx was founded in Silicon Valley in 1984 and is headquartered in San Jose, United States. The company also has offices in Longmont, United States; Dublin, Ireland; Singapore; Hyderabad, India; Beijing, China; Shanghai, China; Brisbane, Australia, Tokyo, Japan and Yerevan, Armenia.<ref name="four">Funding Universe. "Xilinx, Inc. Template:Webarchive" Retrieved January 15, 2009.</ref><ref>Cai Yan, EE Times. "Xilinx testing out China training program Template:Webarchive." Mar 27, 2007. Retrieved Dec 19, 2012.</ref>
According to Bill Carter, former CTO and currentTemplate:When fellow at Xilinx, the choice of the name Xilinx refers to the chemical symbol for silicon Si.<ref name=":6" />Template:HowTemplate:Failed verification The "linx" represents programmable links that connect programmable logic blocks together. The 'X's at each end represent the programmable logic blocks.<ref name="three"/>Template:Citation needed
Xilinx sold a broad range of field programmable gate arrays (FPGAs), and complex programmable logic devices (CPLDs), design tools, intellectual property, and reference designs.<ref name="two">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Xilinx customers represent just over half of the entire programmable logic market, at 51%.<ref name="two"/><ref name="six"/><ref name="twentythree">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Altera is Xilinx's strongest competitor with 34% of the market. Other key players in this market are Actel (now subsidiary of Microsemi) and Lattice Semiconductor.<ref name="eleven"/>
HistoryEdit
Early historyEdit
Ross Freeman, Bernard Vonderschmitt, and James V Barnett II—all former employees of Zilog, an integrated circuit and solid-state device manufacturer—co-founded Xilinx in 1984 with headquarters in San Jose, USA.<ref name="four" /><ref name="three">Xilinx MediaRoom - Press ReleasesTemplate:Dead link. Press.xilinx.com. Retrieved on 2013-11-20.</ref>
While working for Zilog, Freeman wanted to create chips that acted like a blank tape, allowing users to program the technology themselves.<ref name="three" /> "The concept required lots of transistors and, at that time, transistors were considered extremely precious—people thought that Ross's idea was pretty far out", said Xilinx Fellow Bill Carter, hired in 1984 to design ICs as Xilinx's eighth employee.<ref name="three" />
It was at the time more profitable to manufacture generic circuits in massive volumes<ref name="four"/> than specialized circuits for specific markets.<ref name="four"/> FPGAs promised to make specialized circuits profitable.
Freeman could not convince Zilog to invest in FPGAs to chase a market then estimated at $100 million,<ref name="four"/> so he and Barnett left to team up with Vonderschmitt, a former colleague. Together, they raised $4.5 million in venture funding to design the first commercially viable FPGA.<ref name="four"/> They incorporated the company in 1984 and began selling its first product by 1985.<ref name="four"/>
By late 1987, the company had raised more than $18 million in venture capital (equivalent to $Template:Inflation million in Template:Inflation-year) and was making nearly $14 million a year.<ref name="four"/><ref name="twelve">The Inflation Calculator Template:Webarchive. Retrieved January 15, 2009.</ref>
ExpansionEdit
From 1988 to 1990, the company's revenue grew each year, from $30 million to $100 million.<ref name="four" /> During this time, Monolithic Memories Inc. (MMI), the company which had been providing funding to Xilinx, was purchased by AMD.<ref name="four" /> As a result, Xilinx dissolved the deal with MMI and went public on the Nasdaq in 1989.<ref name="four" /> The company also moved to a Template:Convert plant in San Jose, California, to handle increasingly large orders from HP, Apple Inc., IBM and Sun Microsystems.<ref name="four" />
Other FPGA makers emerged in the mid-1990s.<ref name="four" /> By 1995, the company reached $550 million in revenue.<ref name="four" /> Over the years, Xilinx expanded operations to India, Asia and Europe.<ref name="five">Company Release. "Xilinx Underscores Commitment to China Template:Webarchive." November 1, 2006. Retrieved January 15, 2009.</ref><ref name="eight">EE Times Asia. "Xilinx investing $40 million in Singapore operations Template:Webarchive." November 16, 2005. Retrieved January 15, 2009.</ref><ref name="nine">Pradeep Chakraborty. "India a high growth area for Xilinx Template:Webarchive." August 8, 2008. Retrieved January 15, 2009.</ref><ref name="ten">EDB Singapore. "Xilinx, Inc. strengthens presence in Singapore to stay ahead of competition Template:Webarchive." December 1, 2007. Retrieved January 15, 2009.</ref>
Xilinx's sales rose to $2.53 billion by the end of its fiscal year 2018.<ref>Xilinx Earnings Report. "[1] Template:Webarchive." April 25, 2018. Retrieved April 25, 2018.</ref> Moshe Gavrielov – an EDA and ASIC industry veteran who was appointed president and CEO in early 2008 – introduced targeted design platforms that combine FPGAs with software, IP cores, boards and kits to address focused target applications.<ref name="embedded">Embedded Technology Journal, “Introducing the Xilinx Targeted Design Platform: Fulfilling the Programmable Imperative Template:Webarchive.” Retrieved June 10, 2010.</ref> These platforms provide an alternative to costly application-specific integrated circuits (ASICs) and application-specific standard products (ASSPs).<ref name="twentyeight">Lou Sosa, Electronic Design. "PLDs Present The Key To Xilinx's Success Template:Webarchive." June 12, 2008. Retrieved January 20, 2008.</ref><ref name="twentynine">Mike Santarini, EDN. "Congratulations on the Xilinx CEO gig, Moshe! Template:Webarchive." January 8, 2008. Retrieved January 20, 2008.</ref><ref name=":0">Ron Wilson, EDN. "Moshe Gavrielov Looks into the Future of Xilinx and the FPGA Industry Template:Webarchive." January 7, 2008. Retrieved January 20, 2008.</ref>
On January 4, 2018, Victor Peng, the company's COO, replaced Gavrielov as CEO.<ref name=XilinxPressRelease08Jan2018>Company Release. "Xilinx Appoints Victor Peng as President and Chief Executive Officer Template:Webarchive." Jan 8, 2018</ref>
Recent historyEdit
In 2011, the company introduced the Virtex-7 2000T, the first product based on 2.5D stacked silicon (based on silicon interposer technology) to deliver larger FPGAs than could be built using standard monolithic silicon.<ref name=":6">PR Newswire "Xilinx ships world's highest capacity FPGA and shatters industry record for number of transistors by 2x Template:Webarchive" October 2011. Retrieved May 1st, 2018</ref> Xilinx then adapted the technology to combine formerly separate components in a single chip, first combining an FPGA with transceivers based on heterogeneous process technology to boost bandwidth capacity while using less power.<ref>Clive Maxfield, EETimes. "Xilinx ships the world’s first heterogeneous 3D FPGA Template:Webarchive." May 30, 2012. Retrieved June 12, 2012.</ref>
According to former Xilinx CEO Moshe Gavrielov, the addition of a heterogeneous communications device, combined with the introduction of new software tools and the Zynq-7000 line of 28 nm SoC devices that combine an ARM core with an FPGA, are part of shifting its position from a programmable logic device supplier to one delivering “all things programmable”.<ref name=ElectronicProductNews15May2012>Electronic Product News. "Interview with Moshe Gavrielov, president, CEO, Xilinx Template:Webarchive." May 15, 2012. Retrieved June 12, 2012.</ref>
In addition to Zynq-7000, Xilinx product lines include the Virtex, Kintex and Artix series, each including configurations and models optimized for different applications.<ref name="thirtythree">DSP-FPGA.com. Xilinx FPGA Products Template:Webarchive.” April 2010. Retrieved June 10, 2010.</ref> In April 2012, the company introduced the Vivado Design Suite - a next-generation SoC-strength design environment for advanced electronic system designs.<ref name="EETimes25Apr2012">Brian Bailey, EE Times. "Second generation for FPGA software Template:Webarchive." Apr 25, 2012. Retrieved Dec 21, 2012.</ref> In May, 2014, the company shipped the first of the next generation FPGAs: the 20nm UltraScale.<ref name=XCellDaily>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
In September 2017, Amazon and Xilinx started a campaign for FPGA adoption. This campaign enables AWS Marketplace's Amazon Machine Images (AMIs) with associated Amazon FPGA Instances created by partners. The two companies released software development tools to simplify the creation of FPGA technology. The tools create and manage the machine images created and sold by partners.<ref name="FBS13Dec2016">Karl Freund, Forbes (magazine). "Amazon's Xilinx FPGA Cloud: Why This May Be A Significant Milestone Template:Webarchive." December 13, 2016. Retrieved April 26, 2018.</ref><ref name="FBS27Sep2017">Karl Freund, Forbes (magazine). "Amazon And Xilinx Deliver New FPGA Solutions Template:Webarchive." September 27, 2017. Retrieved April 26, 2018.</ref>
In July 2018, Xilinx acquired DeepPhi Technology, a Chinese machine learning startup founded in 2016.<ref name=":4">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>Template:Cite news</ref> In October 2018, the Xilinx Virtex UltraScale+ FPGAs and NGCodec's H.265 video encoder were used in a cloud-based video coding service using the High Efficiency Video Coding (HEVC).<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The combination enables video streaming with the same visual quality as that using GPUs, but at 35%-45% lower bitrate.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
In November 2018, the company's Zynq UltraScale+ family of multiprocessor system-on-chips was certified to safety integrity level (SIL) 3 HFT1 of the IEC 61508 specification.<ref name=":2">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> With this certification, developers are able to use the MPSoC platform in AI-based safety applications of up to SIL 3, in industrial 4.0 platforms of automotive, aerospace, and AI systems.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> In January 2019, ZF Friedrichshafen AG (ZF) worked with Xilinx's Zynq to power its ProAI automotive control unit, which is used to enable automated driving applications.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Xilinx's platform overlooks the aggregation, pre-processing, and distribution of real-time data, and accelerates the AI processing of the unit.<ref name=":2" /><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
In November 2018, Xilinx migrated its defense-grade XQ UltraScale+ products to TSMC's 16 nm FinFET process.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The products included the industry's first defense-grade heterogeneous multi-processor SoC devices and encompassed the XQ Zynq UltraScale+ MPSoCs and RFSoCs as well as XQ UltraScale+ Kintex and Virtex FPGAs.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> That same month the company expanded its Alveo data center accelerator cards portfolio with the Alveo U280.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The initial Alveo line included the U200 and U250, which featured 16 nm UltraScale+ Virtex FPGAs and DDR4 SDRAM.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Those two cards were launched in October 2018 at the Xilinx Developer Forum.<ref name=":3">Template:Cite news</ref> At the Forum, Victor Peng, CEO of semiconductor design at Xilinx, and AMD CTO Mark Papermaster, used eight Alveo U250 cards and two AMD Epyc 7551 server CPUs to set a new world record for inference throughput at 30,000 images per second.<ref name=":3" />
Also in November 2018, Xilinx announced that Dell EMC was the first server vendor to qualify its Alveo U200 accelerator card, used to accelerate key HPC and other workloads with select Dell EMC PowerEdge servers.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The U280 included support for high-bandwidth memory (HBM2) and high-performance server interconnect.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> In August 2019, Xilinx launched the Alveo U50, a low-profile adaptable accelerator with PCIe Gen4 support.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The U55C accelerator card was launched in November 2021, designed for HPCC and big data workloads by incorporating the RoCE v2-based clustering solution, allowing for FPGA-based HPCC clustering to be integrated into existing data center infrastructures.<ref name="U55C">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
In January 2019 K&L Gates, a law firm representing Xilinx sent a DMCA cease and desist letter to an EE YouTuber claiming trademark infringement for featuring the Xilinx logo next to Altera's in an educational video.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Xilinx refused to reply until a video outlining the legal threat was published, after which they sent an apology e-mail.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
In January 2019, Baidu announced that its new edge acceleration computing product, EdgeBoard, was powered by Xilinx.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Edgeboard is a part of the Baidu Brain AI Hardware Platform Initiative, which encompasses Baidu's open computing services, and hardware and software products for its edge AI applications.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Edgeboard is based on the Xilinx Zynq UltraScale+ MPSoC, which uses real-time processors together with programmable logic.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The Xilinx-based Edgeboard can be used to develop products like smart-video security surveillance solutions, advanced-driver-assistance systems, and next-generation robots.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
In February 2019, the company announced two new generations of its Zynq UltraScale+ RF system on chip (RFSoC) portfolio.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The device covers the entire sub-6 GHz spectrum, which is necessary for 5G, and the updates included: an extended millimeter wave interface, up to 20% power reduction in the RF data converter subsystem compared to the base portfolio, and support of 5G New Radio.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The second generation release covered up to 5 GHz, while the third went up to 6 GHz.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> As of February, the portfolio was the only adaptable radio platform single chip that had been designed to address the industry's 5G network needs.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The second announcement revealed that Xilinx and Samsung Electronics performed the world's first 5G New Radio (NR) commercial deployment in South Korea.<ref name=":0a">Template:Cite news</ref><ref name=":1">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The two companies developed and deployed 5G massive multiple-input, multiple-output (m-MIMO) and millimeter wave (mmWave) products using Xilinx's UltraScale+ platform.<ref name=":0a" /> The capabilities are essential for 5G commercialization.<ref name=":1" /> The companies also announced collaboration on Xilinx's Versal adaptable compute acceleration platform (ACAP) products that will deliver 5G services.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> In February 2019, Xilinx introduced an HDMI 2.1 IP subsystem core, which enabled the company's devices to transmit, receive, and process up to 8K (7680 x 4320 pixels) UHD video in media players, cameras, monitors, LED walls, projectors, and kernel-based virtual machines.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
In April 2019, Xilinx entered into a definitive agreement to acquire Solarflare Communications, Inc.<ref name="electronics360.globalspec.com">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref name="Xilinx to Acquire Solarflare">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Xilinx became a strategic investor in Solarflare in 2017.<ref name="Xilinx to Acquire Solarflare"/><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The companies have been collaborating since then on advanced networking technology, and in March 2019 demonstrated their first joint solution: a single-chip FPGA-based 100G NIC. The acquisition enables Xilinx to combine its FPGA, MPSoC and ACAP solutionsTemplate:Buzzword inline with Solarflare's NIC technology.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref name="electronics360.globalspec.com"/><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> In August 2019, Xilinx announced that the company would be adding the world's largest FPGA - the Virtex Ultrascale+ VU19P, to the 16 nm Virtex Ultrascale+ family. The VU19P contains 35 billion transistors.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>Template:Cite news</ref>
In June 2019, Xilinx announced that it was shipping its first Versal chips.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Using ACAP, the chips’ hardware and software can be programmed to run almost any kind of AI software.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> On October 1, 2019, Xilinx announced the launch of Vitis, a unified free and open source software platform that helps developers take advantage of hardware adaptability.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
In 2019, Xilinx exceeded $3 billion in annual revenues for the first time, announcing revenues of $3.06 billion, up 24% from the prior fiscal year.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Revenues were $828 million for the fourth quarter of the fiscal year 2019, up 4% from the prior quarter and up 30% year over year.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Xilinx's communications sector represented 41% of the revenue; the industrial, aerospace and defense sectors represented 27%; the data center and test, measurement & emulation (TME) sectors accounted for 18%; and the automotive, broadcast and consumer markets contributed 14%.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
In August 2020, Subaru announced the use of one of Xilinx's chips as processing power for camera images in its driver-assistance system.<ref>Template:Cite news</ref> In September 2020, Xilinx announced its new chipset, the T1 Telco Accelerator card, that can be used for units running on an open RAN 5G network.<ref>Template:Cite news</ref>
On October 27, 2020, AMD reached an agreement to acquire Xilinx in a stock-swap deal, valuing the company at $35 billion. The deal was expected to close by the end of 2021.<ref>Template:Cite news</ref> Their stockholders approved the acquisition on April 7, 2021.<ref>Template:Cite news</ref> The deal was completed on February 14, 2022.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Since the acquisition was completed, all Xilinx products are co-branded as AMD Xilinx; started in June 2023, all Xilinx's products are now being consolidated under AMD's branding.
In December 2020, Xilinx announced they were acquiring the assets of Falcon Computing Systems to enhance the free and open source Vitis platform, a design software for adaptable processing engines to enable highly optimized domain specific accelerators.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
In April 2021, Xilinx announced a collaboration with Mavenir to boost cell phone tower capacity for open 5G networks.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> That same month, the company unveiled the Kria portfolio, a line of small form factor system-on-modules (SOMs) that come with a pre-built software stack to simplify development.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> In June, Xilinx announced it was acquiring German software developer Silexica, for an undisclosed amount.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
TechnologyEdit
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Template:Multiple issues Xilinx designs and develops programmable logic products, including integrated circuits (ICs), software design tools, predefined system functions delivered as intellectual property (IP) cores, design services, customer training, field engineering and technical support.<ref name="two"/> Xilinx sells both FPGAs and CPLDs for electronic equipment manufacturers in end markets such as communications, industrial, consumer, automotive and data processing.<ref>Xcell Journal, "Building Automotive Driver Assistance System Algorithms with Xilinx FPGA platforms Template:Webarchive." October, 2008. Retrieved January 28, 2009.</ref><ref>Xcell Journal, "Taking Designs to New Heights with Space-Grade Virtex-4QV FPGAs Template:Webarchive." July, 2008. Retrieved January 28, 2009.</ref><ref>Xcell Journal, "A Flexible Platform for Satellite-Based High-Performance Computing Template:Webarchive". January 2009 p 22. Retrieved January 28, 2009.</ref><ref>Xcell Journal, "Virtex-5 Powers Reconfigurable Rugged PC Template:Webarchive." January 2009 p28. Retrieved January 28, 2009.</ref><ref>Xcell Journal, "Exploring and Prototyping Designs for Biomedical Applications Template:Webarchive." July 2008. Retrieved January 28, 2009.</ref><ref>Xcell Journal, "Security Video Analytics on Xilinx Spartan-3A DSP Template:Webarchive." October 2008. Retrieved January 28, 2009.</ref><ref>Xcell Journal, "A/V Monitoring System Rides Virtex-5 Template:Webarchive." October 2008. Retrieved January 28, 2009.</ref>
Xilinx's FPGAs have been used for the ALICE (A Large Ion Collider Experiment) at the CERN European laboratory on the French-Swiss border to map and disentangle the trajectories of thousands of subatomic particles.<ref>Xcell Journal, "CERN Scientists Use Virtex-4 FPGAs for Big Bang Research Template:Webarchive." July 2008. Retrieved January 28, 2009.</ref> Xilinx has also engaged in a partnership with the United States Air Force Research Laboratory's Space Vehicles Directorate to develop FPGAs to withstand the damaging effects of radiation in space, which are 1,000 times less sensitive to space radiation than the commercial equivalent, for deployment in new satellites.<ref name=Kleiman>By Michael Kleinman, US Airforce News. “New computer chip cuts costs, adds efficiency to space systems.” September 21, 2010. Retrieved September 23, 2010.</ref> Xilinx FPGAs can run a regular embedded OS (such as Linux or vxWorks) and can implement processor peripherals in programmable logic.<ref name="two" /> The Virtex-II Pro, Virtex-4, Virtex-5, and Virtex-6 FPGA families, which include up to two embedded PowerPC cores, are targeted to the needs of system-on-chip (SoC) designers.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref name="eweekly">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>Richard Wilson, ElectronicsWeekly.com, "Xilinx repositions FPGAs with SoC move Template:Webarchive." February 2, 2009. Retrieved on February 2, 2009.</ref>
Xilinx's IP cores include IP for simple functions (BCD encoders, counters, etc.), for domain specific cores (digital signal processing, FFT and FIR cores) to complex systems (multi-gigabit networking cores, the MicroBlaze soft microprocessor and the compact Picoblaze microcontroller).<ref name="two"/> Xilinx also creates custom cores for a fee.Template:Citation needed
The main design toolkit Xilinx provides engineers is the Vivado Design Suite, an integrated design environment (IDE) with a system-to-IC level tools built on a shared scalable data model and a common debug environment. Vivado includes electronic system level (ESL) design tools for synthesizing and verifying C-based algorithmic IP; standards based packaging of both algorithmic and RTL IP for reuse; standards based IP stitching and systems integration of all types of system building blocks; and the verification of blocks and systems.<ref>EDN. "The Vivado Design Suite accelerates programmable systems integration and implementation by up to 4X Template:Webarchive." Jun 15, 2012. Retrieved Jun 25, 2013.</ref> A free version WebPACK Edition of Vivado provides designers with a limited version of the design environment.<ref>Clive Maxfield, EE Times. "WebPACK edition of Xilinx Vivado Design Suite now available Template:Webarchive." Dec 20, 2012. Retrieved Jun 25, 2013.</ref>
Xilinx's Embedded Developer's Kit (EDK) supports the embedded PowerPC 405 and 440 cores (in Virtex-II Pro and some Virtex-4 and -5 chips) and the Microblaze core. Xilinx's System Generator for DSP implements DSP designs on Xilinx FPGAs. A freeware version of its EDA software called ISE WebPACK is used with some of its non-high-performance chips. Xilinx is the only (as of 2007) FPGA vendor to distribute a native Linux freeware synthesis toolchain.<ref name="cheung">Ken Cheung, EDA Geek. “Xilinx Rolls Out Embedded Development Kit 9.li Template:Webarchive.” March 26, 2007. Retrieved June 10, 2010.</ref>
Xilinx announced the architecture for a new ARM Cortex-A9-based platform for embedded systems designers, that combines the software programmability of an embedded processor with the hardware flexibility of an FPGA.<ref name="EETimesApril27">Rich Nass, EE Times. "Xilinx puts ARM core into its FPGAs Template:Webarchive." April 27, 2010. Retrieved February 14, 2011.</ref><ref name="DesignReuseMay3">Steve Leibson, Design-Reuse. "Xilinx redefines the high-end microcontroller with its ARM-based Extensible Processing Platform - Part 1 Template:Webarchive." May 3, 2010. Retrieved February 15, 2011.</ref> The new architecture abstracts much of the hardware burden away from the embedded software developers' point of view, giving them an unprecedented level of control in the development process.<ref name="EETimesApril28">Toni McConnel, EE Times. "Xilinx Extensible Processing Platform combines best of serial and parallel processing Template:Webarchive." April 28, 2010. Retrieved February 14, 2011.</ref><ref name="FPGABlogApril27">Ken Cheung, FPGA Blog. "Xilinx Extensible Processing Platform for Embedded Systems Template:Webarchive." April 27, 2010. Retrieved February 14, 2011.</ref><ref name="EETimesApril27"/><ref name="DesignReuseMay3"/> With this platform, software developers can leverage their existing system code based on ARM technology and utilize vast off-the-shelf open-source and commercially available software component libraries.<ref name="EETimesApril28"/><ref name="FPGABlogApril27"/><ref name="EETimesApril27"/><ref name="DesignReuseMay3"/> Because the system boots an OS at reset, software development can get under way quickly within familiar development and debug environments using tools such as ARM's RealView development suite and related third-party tools, Eclipse-based IDEs, GNU, the Xilinx Software Development Kit and others.<ref name="EETimesApril28"/><ref name="FPGABlogApril27"/><ref name="EETimesApril27"/><ref name="DesignReuseMay3"/> In early 2011, Xilinx began shipping the Zynq-7000 SoC platform immerses ARM multi-cores, programmable logic fabric, DSP data paths, memories and I/O functions in a dense and configurable mesh of interconnect.<ref name="EETimesMarch1">Colin Holland, EE Times. "Xilinx provides details on ARM-based devices Template:Webarchive." March 1, 2011. Retrieved March 1, 2011.</ref><ref name="EmbeddedWorldMarch1">Laura Hopperton, Newelectronics. "Embedded world: Xilinx introduces 'industry's first' extensible processing platform Template:Webarchive." March 1, 2011. Retrieved March 1, 2011.</ref> The platform targets embedded designers working on market applications that require multi-functionality and real-time responsiveness, such as automotive driver assistance, intelligent video surveillance, industrial automation, aerospace and defense, and next-generation wireless.<ref name="EETimesApril28"/><ref name="FPGABlogApril27"/><ref name="EETimesApril27"/><ref name="DesignReuseMay3"/>
Following the introduction of its 28 nm 7-series FPGAs, Xilinx revealed that several of the highest-density parts in those FPGA product lines will be constructed using multiple dies in one package, employing technology developed for 3D construction and stacked-die assemblies.<ref name=ednEurope>EDN Europe. "Xilinx adopts stacked-die 3D packaging Template:Webarchive." November 1, 2010. Retrieved May 12, 2011.</ref><ref name=lawrence>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The company's stacked silicon interconnect (SSI) technology stacks several (three or four) active FPGA dies side by side on a silicon interposer – a single piece of silicon that carries passive interconnect. The individual FPGA dies are conventional, and are flip-chip mounted by microbumps on to the interposer. The interposer provides direct interconnect between the FPGA dies, with no need for transceiver technologies such as high-speed SerDes.<ref name=ednEurope/><ref name=lawrence/><ref>Clive Maxfield, EETimes. "Xilinx multi-FPGA provides mega-boost re capacity, performance, and power efficiency! Template:Webarchive." October 27, 2010. Retrieved May 12, 2011.</ref> In October 2011, Xilinx shipped the first FPGA to use the new technology, the Virtex-7 2000T FPGA, which includes 6.8 billion transistors and 20 million ASIC gates.<ref name=don1025>Don Clark, The Wall Street Journal. "Xilinx Says Four Chips Act Like One Giant Template:Webarchive." October 25, 2011. Retrieved November 18, 2011.</ref><ref name=clive1025>Clive Maxfield, EETimes. "Xilinx tips world’s highest capacity FPGA Template:Webarchive." October 25, 2011. Retrieved November 18, 2011.</ref><ref name=david1025>David Manners, Electronics Weekly. "Xilinx launches 20m ASIC gate stacked silicon FPGA Template:Webarchive." October 25, 2011. Retrieved November 18, 2011.</ref><ref name="scieng1026">Tim Pietruck, SciEngines GmbH. "[2] Template:Webarchive." December 21, 2011 - RIVYERA-V7 2000T FPGA computer with the newest and largest Xilinx Virtex-7</ref> The following spring, Xilinx used 3D technology to ship the Virtex-7 HT, the industry's first heterogeneous FPGAs, which combine high bandwidth FPGAs with a maximum of sixteen 28 Gbit/s and seventy-two 13.1 Gbit/s transceivers to reduce power and size requirements for key Nx100G and 400G line card applications and functions.<ref>Tiernan Ray, Barrons. "Xilinx: 3-D Chip a Route to More Complex Semiconductors Template:Webarchive." May 30, 2012. Retrieved Jan 9, 2013.</ref><ref>Loring Wirbel, EDN. "Xilinx Virtex-7 HT devices use 3D stacking for a high-end communication edge Template:Webarchive." May 30, 2012. Retrieved Jan 9, 2013.</ref>
In January 2011, Xilinx acquired design tool firm AutoESL Design Technologies and added System C high-level design for its 6- and 7-series FPGA families.<ref name="EETimesJan31">Dylan McGrath, EE Times. "Xilinx buys high-level synthesis EDA vendor Template:Webarchive." January 31, 2011. Retrieved February 15, 2011.</ref> The addition of AutoESL tools extended the design community for FPGAs to designers more accustomed to designing at a higher level of abstraction using C, C++ and System C.<ref name="ElectronicsWeelyJan31">Richard Wilson, ElectronicsWeekly.com. "Xilinx acquires ESL firm to make FPGAs easier to use Template:Webarchive." January 31, 2011. Retrieved February 15, 2011.</ref>
In April 2012, Xilinx introduced a revised version of its toolset for programmable systems, called Vivado Design Suite. This IP and system-centric design software supports newer high capacity devices, and speeds the design of programmable logic and I/O.<ref>Brian Bailey, EE Times. "Second generation for FPGA software Template:Webarchive." Apr 25, 2012. Retrieved Jan 3, 2013.</ref> Vivado provides faster integration and implementation for programmable systems into devices with 3D stacked silicon interconnect technology, ARM processing systems, analog mixed signal (AMS), and many semiconductor intellectual property (IP) cores.<ref name="EDN15Jun2012">EDN. "The Vivado Design Suite accelerates programmable systems integration and implementation by up to 4X Template:Webarchive." Jun 15, 2012. Retrieved Jan 3, 2013.</ref>
In July 2019, Xilinx acquired NGCodec, developers of FPGA accelerated video encoders for video streaming, cloud gaming and cloud mixed reality services. NGCodec video encoders include support for H.264/AVC, H.265/HEVC, VP9 and AV1, with planned future support for H.266/VVC and AV2.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
In May 2020, Xilinx installed its first Adaptive Compute Cluster (XACC) at ETH Zurich in Switzerland.<ref name=":5">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The XACCs provide infrastructure and funding to support research in adaptive compute acceleration for high performance computing (HPC).<ref name=":5" /> The clusters include high-end servers, Xilinx Alveo accelerator cards, and high speed networking.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> Three other XACCs will be installed at the University of California, Los Angeles (UCLA); the University of Illinois at Urbana Champaign (UIUC); and the National University of Singapore (NUS).<ref name=":5" /><ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
Family lines of productsEdit
Before 2010, Xilinx offered two main FPGA families: the high-performance Virtex series and the high-volume Spartan series, with a cheaper EasyPath option for ramping to volume production.<ref name="thirtythree"/> The company also provides two CPLD lines: the CoolRunner and the 9500 series. Each model series has been released in multiple generations since its launch.<ref name="Brown">Stephen Brown and Johnathan Rose, University of Toronto. “Architecture of FPGAs and CPLDs: A Tutorial Template:Webarchive.” Retrieved June 10, 2010.</ref> With the introduction of its 28 nm FPGAs in June 2010, Xilinx replaced the high-volume Spartan family with the Kintex family and the low-cost Artix family.<ref name="EET">EE Times. “Xilinx to offer three classes of FPGAs at 28-nm Template:Webarchive.” June 21, 2010. Retrieved September 23, 2010.</ref><ref name="Morris">Kevin Morris, FPGA Journal. “Veni! Vidi! Virtex! (and Kintex and Artix Too) Template:Webarchive.” June 21, 2010. Retrieved September 23, 2010.</ref>
Xilinx's newer FPGA products use a High-κ/Metal-Gate Stack (HKMG) process, which reduces static power consumption while increasing logic capacity.<ref name="harris">Daniel Harris, Electronic Design. “If Only the Original Spartans Could Have Thrived On So Little Power Template:Webarchive.” February 27, 2008. Retrieved January 20, 2008.</ref> In 28 nm devices, static power accounts for much and sometimes most of the total power dissipation. Virtex-6 and Spartan-6 FPGA families are said to consume 50 percent less power, and have up to twice the logic capacity compared to the previous generation of Xilinx FPGAs.<ref name="eweekly"/><ref name="eetimes">Peter Clarke, EE Times, "Xilinx launches Spartan-6, Virtex-6 FPGAs Template:Webarchive." February 2, 2009. Retrieved February 2, 2009</ref><ref name="EDN">Ron Wilson, EDN, "Xilinx FPGA introductions hint at new realities Template:Webarchive." February 2, 2009. Retrieved on February 2, 2009.</ref>
In June 2010, Xilinx introduced the Xilinx 7 series: the Virtex-7, Kintex-7, and Artix-7 families, promising improvements in system power, performance, capacity, and price. These new FPGA families are manufactured using TSMC's 28 nm HKMG process.<ref name="xilinx7">Brent Przybus, Xilinx, "Xilinx Redefines Power, Performance, and Design Productivity with Three New 28 nm FPGA Families: Virtex-7, Kintex-7, and Artix-7 Devices Template:Webarchive." June 21, 2010. Retrieved on June 22, 2010.</ref> The 28 nm series 7 devices feature a 50 percent power reduction compared to the company's 40 nm devices and offer capacity of up to 2 million logic cells.<ref name= EET /> Less than one year after announcing the 7 series 28 nm FPGAs, Xilinx shipped the world's first 28 nm FPGA device, the Kintex-7.<ref>Convergedigest. "Xilinx Ships First 28nm FPGATemplate:Dead link." Mar 18, 2011. Retrieved May 11, 2012.</ref><ref>Clive Maxfield, EETimes. "Xilinx ships first 28nm Kintex-7 FPGAs Template:Webarchive." March 21, 2011. Retrieved May 11, 2012.</ref> In March 2011, Xilinx introduced the Zynq-7000 family, which integrates a complete ARM Cortex-A9 MPCore processor-based system on a 28 nm FPGA for system architects and embedded software developers.<ref name="EETimesMarch1"/><ref name="EmbeddedWorldMarch1"/> In May 2017, Xilinx expanded the 7 Series with the production of the Spartan-7 family.<ref name="spartan7announce">Company Release. "Xilinx Announces the Spartan-7 FPGA Family Template:Webarchive." November 19, 2015.</ref><ref name="spartan7prod">Company Release. "Xilinx Spartan-7 FPGAs Now in Production Template:Webarchive." May 09, 2017.</ref>
In Dec, 2013, Xilinx introduced the UltraScale series: Virtex UltraScale and Kintex UltraScale families. These new FPGA families are manufactured by TSMC in its 20 nm planar process.<ref name=TSMC>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> At the same time it announced an UltraScale SoC architecture, called Zynq UltraScale+ MPSoC, in TSMC 16 nm FinFET process.<ref name="TSMC_16">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
In March 2021, Xilinx announced a new cost-optimized portfolio with Artix and Zynq UltraScale+ devices, fabricated on TSMC's 16 nm process.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
Virtex familyEdit
{{#invoke:Labelled list hatnote|labelledList|Main article|Main articles|Main page|Main pages}} The Virtex series of FPGAs have integrated features that include FIFO and ECC logic, DSP blocks, PCI-Express controllers, Ethernet MAC blocks, and high-speed transceivers. In addition to FPGA logic, the Virtex series includes embedded fixed function hardware for commonly used functions such as multipliers, memories, serial transceivers and microprocessor cores.<ref name="Virtex1">Ron Wilson, EDN. "Xilinx FPGA introductions hint at new realities Template:Webarchive." February 2, 2009 Retrieved June 10, 2010.</ref> These capabilities are used in applications such as wired and wireless infrastructure equipment, advanced medical equipment, test and measurement, and defense systems.<ref name="Virtex2">Design & Reuse. "New Xilinx Virtex-6 FPGA Family Designed to Satisfy Insatiable Demand for Higher Bandwidth and Lower Power Systems Template:Webarchive." February 2, 2009. Retrieved June 10, 2010.</ref>
The Virtex 7 family, is based on a 28 nm design and is reported to deliver a two-fold system performance improvement at 50 percent lower power compared to previous generation Virtex-6 devices. In addition, Virtex-7 doubles the memory bandwidth compared to previous generation Virtex FPGAs with 1866 Mbit/s memory interfacing performance and over two million logic cells.<ref name="EET" /><ref name="Morris" />
In 2011, Xilinx began shipping sample quantities of the Virtex-7 2000T "3D FPGA", which combines four smaller FPGAs into a single package by placing them on a special silicon interconnection pad (called an interposer) to deliver 6.8 billion transistors in a single large chip. The interposer provides 10,000 data pathways between the individual FPGAs — roughly 10 to 100 times more than would usually be available on a board – to create a single FPGA.<ref name="don1025" /><ref name="clive1025" /><ref name="david1025" /> In 2012, using the same 3D technology, Xilinx introduced initial shipments of their Virtex-7 H580T FPGA, a heterogeneous device, so called because it comprises two FPGA dies and one 8-channel 28 Gbit/s transceiver die in the same package.<ref name="ElectronicProductNews15May2012"/>
The Virtex-6 family is built on a 40 nm process for compute-intensive electronic systems, and the company claims it consumes 15 percent less power and has 15 percent improved performance over competing 40 nm FPGAs.<ref>Company Release. "New Xilinx Virtex-6 FPGA Family Designed to Satisfy Insatiable Demand for Higher Bandwidth and Lower Power Systems." February 2, 2009. Retrieved February 2, 2009.</ref>
The Virtex-5 LX and the LXT are intended for logic-intensive applications, and the Virtex-5 SXT is for DSP applications.<ref>DSP DesignLine. "Analysis: Xilinx debuts Virtex-5 FXT, expands SXT Template:Webarchive." June 13, 2008. Retrieved January 20, 2008.</ref> With the Virtex-5, Xilinx changed the logic fabric from four-input LUTs to six-input LUTs. With the increasing complexity of combinational logic functions required by SoC designs, the percentage of combinational paths requiring multiple four-input LUTs had become a performance and routing bottleneck. The six-input LUT represented a tradeoff between better handling of increasingly complex combinational functions, at the expense of a reduction in the absolute number of LUTs per device. The Virtex-5 series is a 65 nm design fabricated in 1.0V, triple-oxide process technology.<ref name="Virtex3">National Instruments. "Advantages of the Xilinx Virtex-5 FPGA Template:Webarchive." June 17, 2009. Retrieved June 29, 2010.</ref>
Legacy Virtex devices (Virtex, Virtex-II, Virtex-II Pro, Virtex 4) are still available, but are not recommended for use in new designs.
KintexEdit
The Kintex-7 family is the first Xilinx mid-range FPGA family that the company claims delivers Virtex-6 family performance at less than half the price while consuming 50 percent less power. The Kintex family includes high-performance 12.5 Gbit/s or lower-cost optimized 6.5 Gbit/s serial connectivity, memory, and logic performance required for applications such as high volume 10G optical wired communication equipment, and provides a balance of signal processing performance, power consumption and cost to support the deployment of Long Term Evolution (LTE) wireless networks.<ref name="EET" /><ref name="Morris" />
In August 2018, SK Telecom deployed Xilinx Kintex UltraScale FPGAs as their artificial intelligence accelerators at their data centers in South Korea.<ref name="kintex">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> The FPGAs run SKT's automatic speech-recognition application to accelerate Nugu, SKT's voice-activated assistant.<ref name="kintex" /><ref>Template:Cite news</ref>
In July, 2020 Xilinx made the latest addition to their Kintex family, 'KU19P FPGA' which delivers more logic fabric and embedded memory<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
ArtixEdit
The Artix-7 family delivers 50 percent lower power and 35 percent lower cost compared to the Spartan-6 family and is based on the unified Virtex-series architecture. The Artix family is designed to address the small form factor and low-power performance requirements of battery-powered portable ultrasound equipment, commercial digital camera lens control, and military avionics and communications equipment.<ref name="EET" /><ref name="Morris" /> With the introduction of the Spartan-7 family in 2017, which lack high-bandwidth transceivers, the Artix-7's was clarified as being the "transceiver optimized" member.<ref name="costOptimizedPortfolio2017">Company Website. "Cost-Optimized Portfolio Template:Webarchive." Retrieved July 5, 2017.</ref>
ZynqEdit
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The Zynq-7000 family of SoCs addresses high-end embedded-system applications, such as video surveillance, automotive-driver assistance, next-generation wireless, and factory automation.<ref name="EETimesMarch1"/><ref name="EmbeddedWorldMarch1"/><ref name="EDNMarch1">Mike Demler, EDN. "Xilinx integrates dual ARM Cortex-A9 MPCore with 28-nm, low-power programmable logic Template:Webarchive." March 1, 2011. Retrieved March 1, 2011.</ref> Zynq-7000 integrate a complete ARM Cortex-A9 MPCore-processor-based 28 nm system. The Zynq architecture differs from previous marriages of programmable logic and embedded processors by moving from an FPGA-centric platform to a processor-centric model.<ref name="EETimesMarch1"/><ref name="EmbeddedWorldMarch1"/><ref name="EDNMarch1"/> For software developers, Zynq-7000 appear the same as a standard, fully featured ARM processor-based system-on-chip (SoC), booting immediately at power-up and capable of running a variety of operating systems independently of the programmable logic.<ref name="EETimesMarch1"/><ref name="EmbeddedWorldMarch1"/><ref name="EDNMarch1"/> In 2013, Xilinx introduced the Zynq-7100, which integrates digital signal processing (DSP) to meet emerging programmable systems integration requirements of wireless, broadcast, medical and military applications.<ref>Clive Maxfield, EETimes. "Xilinx unveils new Zynq-7100 All Programmable SoCs Template:Webarchive." Mar 20, 2013. Retrieved Jun 3, 2013.</ref>
The new Zynq-7000 product family posed a key challenge for system designers, because Xilinx ISE design software had not been developed to handle the capacity and complexity of designing with an FPGA with an ARM core.<ref name="EETimes25Apr2012"/><ref name="EDN15Jun2012"/> Xilinx's new Vivado Design Suite addressed this issue, because the software was developed for higher capacity FPGAs, and it included high level synthesis (HLS) functionality that allows engineers to compile the co-processors from a C-based description.<ref name="EETimes25Apr2012"/><ref name=EDN15Jun2012/>
The AXIOM,<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref> the world's first digital cinema camera that is open source hardware, contains a Zynq-7000.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
Spartan familyEdit
The Spartan series targets low cost, high-volume applications with a low-power footprint e.g. displays, set-top boxes, wireless routers and other applications.<ref name="spartan">Daniel Harris, Electronic Design. "If only the original spartans could have thrived on so little power Template:Webarchive." February 27, 2008. Retrieved January 20, 2008.</ref>
The Spartan-6 family is built on a 45 nm, 9-metal layer, dual-oxide process technology.<ref name="eetimes"/><ref name="spartanrelease">Company Release. "The low-cost Spartan-6 FPGA family delivers an optimal balance of low risk, low cost, low power, and high performance Template:Dead linkTemplate:Cbignore." February 2, 2009.</ref> The Spartan-6 was marketed in 2009 as a low-cost option for automotive, wireless communications, flat-panel display and video surveillance applications.<ref name="spartanrelease"/>
The Spartan-7 family, built on the same 28nm process used in the other 7-Series FPGAs, was announced in 2015,<ref name="spartan7announce"/> and became available in 2017.<ref name="spartan7prod"/> Unlike the Artix-7 family and the "LXT" members of the Spartan-6 family, the Spartan-7 FPGAs lack high-bandwidth transceivers.<ref name="costOptimizedPortfolio2017"/>
EasyPathEdit
Because EasyPath devices are identical to the FPGAs that customers are already using the parts can be produced faster and more reliably from the time they are ordered compared to similar competing programs.<ref name="thirtyone">{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
VersalEdit
Versal is Xilinx's 7 nm architecture that targets heterogeneous computing needs in datacenter acceleration applications, in artificial intelligence acceleration at the edge, Internet of things (IoT) applications and embedded computing.
The Everest program focuses on the Versal Adaptive Compute Acceleration Platform (ACAP), a product category combining a traditional FPGA fabric with an ARM system on chip and a set of coprocessors, connected through a network on a chip.<ref name="VB20190618">"Xilinx ships first Versal ACAP chips that adapt to AI programs Template:Webarchive." June 18, 2019. Retrieved Feb 26, 2020.</ref> Xilinx's goal was to reduce the barriers to adoption of FPGAs for accelerated compute-intensive datacenter workloads.<ref name="FBS26Mar2018">Karl Freund, Forbes (magazine). "Xilinx Everest: Enabling FPGA Acceleration With ACAP Template:Webarchive." March 26, 2018. Retrieved April 26, 2018.</ref> They are designed for a wide range of applications in the fields of big data and machine learning, including video transcoding, database querying, data compression, search, AI inferencing, machine vision, computer vision, autonomous vehicles, genomics, computational storage and network acceleration.<ref name="VB20190618"/>
On April 15, 2020, it was announced that Xilinx would supply its Versal chips to Samsung Electronics for 5G networking equipment.<ref>"Samsung to tap Xilinx chips for 5G network equipment Template:Webarchive." Apr 16, 2020. Retrieved April 16, 2020.</ref> In July 2021, Xilinx debuted the Versal HBM, which combines the network interface of the platform with HBM2e memory to alleviate data bottlenecking.<ref>{{#invoke:citation/CS1|citation |CitationClass=web }}</ref>
See alsoEdit
ReferencesEdit
External linksEdit
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