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===Versal=== Versal is Xilinx's 7 nm architecture that targets [[heterogeneous computing]] needs in datacenter acceleration applications, in [[artificial intelligence]] acceleration at the [[edge computing|edge]], [[Internet of things]] (IoT) applications and [[embedded computing]]. The Everest program focuses on the Versal Adaptive Compute Acceleration Platform (ACAP), a product category combining a traditional FPGA fabric with an [[ARM architecture|ARM]] [[system on chip]] and a set of [[coprocessor]]s, connected through a [[network on a chip]].<ref name="VB20190618">"[https://venturebeat.com/2019/06/18/xilinx-ships-first-versal-acap-chips-that-adapt-to-ai-programs/ Xilinx ships first Versal ACAP chips that adapt to AI programs] {{Webarchive|url=https://web.archive.org/web/20200521204130/https://venturebeat.com/2019/06/18/xilinx-ships-first-versal-acap-chips-that-adapt-to-ai-programs/ |date=2020-05-21 }}." June 18, 2019. Retrieved Feb 26, 2020.</ref> Xilinx's goal was to reduce the barriers to adoption of FPGAs for accelerated compute-intensive datacenter workloads.<ref name="FBS26Mar2018">Karl Freund, [[Forbes (magazine)]]. "[https://www.forbes.com/sites/moorinsights/2018/03/26/xilinx-everest-enabling-fpga-acceleration-with-acap/#5b2a9b6b342e Xilinx Everest: Enabling FPGA Acceleration With ACAP] {{Webarchive|url=https://web.archive.org/web/20180612144257/https://www.forbes.com/sites/moorinsights/2018/03/26/xilinx-everest-enabling-fpga-acceleration-with-acap/#5b2a9b6b342e |date=2018-06-12 }}." March 26, 2018. Retrieved April 26, 2018.</ref> They are designed for a wide range of applications in the fields of [[big data]] and [[machine learning]], including video transcoding, database querying, data compression, search, [[inference#Inference engines|AI inferencing]], [[machine vision]], [[computer vision]], [[vehicular automation|autonomous vehicles]], [[genomics]], computational storage and network acceleration.<ref name="VB20190618"/> On April 15, 2020, it was announced that Xilinx would supply its Versal chips to [[Samsung Electronics]] for 5G networking equipment.<ref>"[https://www.platformexecutive.com/news/mobile-telecoms-infrastructure/samsung-to-tap-xilinx-chips-for-5g-network-equipment/ Samsung to tap Xilinx chips for 5G network equipment] {{Webarchive|url=https://web.archive.org/web/20201011022347/https://www.platformexecutive.com/news/mobile-telecoms-infrastructure/samsung-to-tap-xilinx-chips-for-5g-network-equipment/ |date=2020-10-11 }}." Apr 16, 2020. Retrieved April 16, 2020.</ref> In July 2021, Xilinx debuted the Versal HBM, which combines the network interface of the platform with [[High Bandwidth Memory|HBM2e]] memory to alleviate data bottlenecking.<ref>{{cite web |last1=McGregor |first1=Jim |title=Xilinx Ups The Ante In High-Performance Processing With Versal HBM |url=https://www.forbes.com/sites/tiriasresearch/2021/07/15/xilinx-ups-the-ante-in-high-performance-processing-with-versal-hbm/?sh=4d3955f455e1 |website=Forbes |access-date=28 September 2021 |language=en}}</ref>
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