Editing Xilinx (section)

==Technology==
[[File:Xilinx Spartan-3E (XC3S500E).jpg|thumb|The Spartan-3 platform was the industry's first 90nm FPGA, delivering more functionality and bandwidth per dollar than was previously possible.]]
{{Multiple issues|section=yes|
{{Overly detailed|section|date=March 2020}}
{{Promotional section|date=June 2020}}
}}
Xilinx designs and develops programmable logic products, including integrated circuits (ICs), software design tools, predefined system functions delivered as intellectual property (IP) cores, design services, customer training, field engineering and technical support.<ref name="two"/> Xilinx sells both FPGAs and CPLDs for electronic equipment manufacturers in end markets such as [[communications]], industrial, [[consumer]], [[automotive]] and [[data processing]].<ref>Xcell Journal, "[http://www.xilinx.com/publications/xcellonline/xcell_66/xc_pdf/p20-26_66_F_XiASIM1.pdf Building Automotive Driver Assistance System Algorithms with Xilinx FPGA platforms] {{webarchive|url=https://web.archive.org/web/20090327150948/http://www.xilinx.com/publications/xcellonline/xcell_66/xc_pdf/p20-26_66_F_XiASIM1.pdf |date=2009-03-27 }}." October, 2008. Retrieved January 28, 2009.</ref><ref>Xcell Journal, "[http://www.xilinx.com/publications/xcellonline/xcell_65/xc_pdf/p22-26_65_XIAD.pdf Taking Designs to New Heights with Space-Grade Virtex-4QV FPGAs] {{webarchive|url=https://web.archive.org/web/20090327150956/http://www.xilinx.com/publications/xcellonline/xcell_65/xc_pdf/p22-26_65_XIAD.pdf |date=2009-03-27 }}." July, 2008. Retrieved January 28, 2009.</ref><ref>Xcell Journal, "[http://cde.cerosmedia.com/1R4975d4df9f378012.cde A Flexible Platform for Satellite-Based High-Performance Computing] {{Webarchive|url=https://web.archive.org/web/20090202064610/http://cde.cerosmedia.com/1R4975d4df9f378012.cde |date=2009-02-02 }}". January 2009 p 22. Retrieved January 28, 2009.</ref><ref>Xcell Journal, "[http://cde.cerosmedia.com/1R4975d4df9f378012.cde Virtex-5 Powers Reconfigurable Rugged PC] {{Webarchive|url=https://web.archive.org/web/20090202064610/http://cde.cerosmedia.com/1R4975d4df9f378012.cde |date=2009-02-02 }}." January 2009 p28. Retrieved January 28, 2009.</ref><ref>Xcell Journal, "[http://www.xilinx.com/publications/xcellonline/xcell_65/xc_pdf/p18-21_65_F_ASIM.pdf Exploring and Prototyping Designs for Biomedical Applications] {{webarchive|url=https://web.archive.org/web/20090327150949/http://www.xilinx.com/publications/xcellonline/xcell_65/xc_pdf/p18-21_65_F_ASIM.pdf |date=2009-03-27 }}." July 2008. Retrieved January 28, 2009.</ref><ref>Xcell Journal, "[http://www.xilinx.com/publications/xcellonline/xcell_66/xc_pdf/p28-32_66_F_XiAISM2.pdf Security Video Analytics on Xilinx Spartan-3A DSP] {{webarchive|url=https://web.archive.org/web/20090327150947/http://www.xilinx.com/publications/xcellonline/xcell_66/xc_pdf/p28-32_66_F_XiAISM2.pdf |date=2009-03-27 }}." October 2008. Retrieved January 28, 2009.</ref><ref>Xcell Journal, "[http://www.xilinx.com/publications/xcellonline/xcell_66/xc_pdf/p34-39_66_F_XiWild.pdf A/V Monitoring System Rides Virtex-5] {{webarchive|url=https://web.archive.org/web/20090327150958/http://www.xilinx.com/publications/xcellonline/xcell_66/xc_pdf/p34-39_66_F_XiWild.pdf |date=2009-03-27 }}." October 2008. Retrieved January 28, 2009.</ref>

Xilinx's FPGAs have been used for the [[A Large Ion Collider Experiment|ALICE]] (A Large Ion Collider Experiment) at the [[CERN]] European laboratory on the [[France|French]]-[[Switzerland|Swiss]] border to map and disentangle the trajectories of thousands of [[subatomic particles]].<ref>Xcell Journal, "[http://www.xilinx.com/publications/xcellonline/xcell_65/xc_pdf/p28_31_65_F_XiWild.pdf CERN Scientists Use Virtex-4 FPGAs for Big Bang Research] {{webarchive |url=https://web.archive.org/web/20090327150946/http://www.xilinx.com/publications/xcellonline/xcell_65/xc_pdf/p28_31_65_F_XiWild.pdf |date=March 27, 2009}}." July 2008. Retrieved January 28, 2009.</ref> Xilinx has also engaged in a partnership with the [[United States Air Force]] Research Laboratory's Space Vehicles Directorate to develop FPGAs to withstand the damaging effects of [[space radiation|radiation in space]], which are 1,000 times less sensitive to space radiation than the commercial equivalent, for deployment in new satellites.<ref name=Kleiman>By Michael Kleinman, US Airforce News. “[https://www.af.mil/News/story/storyID/123222935/ New computer chip cuts costs, adds efficiency to space systems.]” September 21, 2010. Retrieved September 23, 2010.</ref> Xilinx FPGAs can run a regular embedded OS (such as [[Linux]] or [[vxWorks]]) and can implement processor peripherals in programmable logic.<ref name="two" /> The Virtex-II Pro, Virtex-4, Virtex-5, and Virtex-6 FPGA families, which include up to two embedded [[PowerPC]] cores, are targeted to the needs of [[system-on-chip]] (SoC) designers.<ref>{{Cite web |url=http://www.xilinx.com/support/documentation/data_sheets/ds083.pdf |title=Virtex-II Pro Datasheet |access-date=2009-01-29 |archive-date=2009-03-27 |archive-url=https://web.archive.org/web/20090327150952/http://www.xilinx.com/support/documentation/data_sheets/ds083.pdf |url-status=live }}</ref><ref name="eweekly">{{Cite web |url=http://www.xilinx.com/support/documentation/data_sheets/ds112.pdf |title=Virtex-4 Family Overview |access-date=2009-01-29 |archive-date=2009-02-06 |archive-url=https://web.archive.org/web/20090206003430/http://www.xilinx.com/support/documentation/data_sheets/ds112.pdf |url-status=live }}</ref><ref>Richard Wilson, ElectronicsWeekly.com, "[http://www.electronicsweekly.com/Articles/2009/02/02/45377/xilinx-repositions-fpgas-with-soc-move.htm Xilinx repositions FPGAs with SoC move] {{Webarchive|url=https://web.archive.org/web/20201011022347/https://www.electronicsweekly.com/news/products/ |date=2020-10-11 }}." February 2, 2009. Retrieved on February 2, 2009.</ref>

Xilinx's IP cores include IP for simple functions ([[Binary-coded decimal|BCD]] encoders, counters, etc.), for domain specific cores ([[digital signal processing]], [[Fast Fourier transform|FFT]] and [[Free ideal ring|FIR]] cores) to complex systems (multi-gigabit networking cores, the MicroBlaze soft microprocessor and the compact Picoblaze [[microcontroller]]).<ref name="two"/> Xilinx also creates custom cores for a fee.{{Citation needed|date=June 2019}}

The main design toolkit Xilinx provides engineers is the [[Xilinx Vivado|Vivado Design Suite]], an [[Integrated development environment|integrated design environment]] (IDE) with a system-to-IC level tools built on a shared scalable data model and a common debug environment. Vivado includes electronic system level (ESL) design tools for synthesizing and verifying C-based algorithmic IP; standards based packaging of both algorithmic and RTL IP for reuse; standards based IP stitching and systems integration of all types of system building blocks; and the verification of blocks and systems.<ref>EDN. "[http://www.edn.com/electronics-products/other/4375467/The-Vivado-Design-Suite-accelerates-programmable-systems-integration-by-up-to-4X The Vivado Design Suite accelerates programmable systems integration and implementation by up to 4X] {{Webarchive|url=https://web.archive.org/web/20130116054344/http://www.edn.com/electronics-products/other/4375467/The-Vivado-Design-Suite-accelerates-programmable-systems-integration-by-up-to-4X |date=2013-01-16 }}." Jun 15, 2012. Retrieved Jun 25, 2013.</ref> A free version WebPACK Edition of Vivado provides designers with a limited version of the design environment.<ref>Clive Maxfield, [[EE Times]]. "[http://www.eetimes.com/electronics-products/electronic-product-reviews/fpga-pld-products/4403821/WebPACK-edition-of-Xilinx-Vivado-Design-Suite-now-available WebPACK edition of Xilinx Vivado Design Suite now available] {{Webarchive|url=https://web.archive.org/web/20130211010306/http://eetimes.com/electronics-products/electronic-product-reviews/fpga-pld-products/4403821/WebPACK-edition-of-Xilinx-Vivado-Design-Suite-now-available |date=2013-02-11 }}." Dec 20, 2012. Retrieved Jun 25, 2013.</ref>

Xilinx's Embedded Developer's Kit (EDK) supports the embedded [[PowerPC]] 405 and 440 cores (in Virtex-II Pro and some Virtex-4 and -5 chips) and the [[Microblaze]] core. Xilinx's System Generator for DSP implements DSP designs on Xilinx FPGAs. A freeware version of its EDA software called ISE WebPACK is used with some of its non-high-performance chips. Xilinx is the only (as of 2007) FPGA vendor to distribute a native Linux freeware synthesis toolchain.<ref name="cheung">Ken Cheung, EDA Geek. “[http://edageek.com/2007/03/26/xilinx-edk/ Xilinx Rolls Out Embedded Development Kit 9.li] {{Webarchive|url=https://web.archive.org/web/20150320135455/http://edageek.com/2007/03/26/xilinx-edk/ |date=2015-03-20 }}.” March 26, 2007. Retrieved June 10, 2010.</ref>

Xilinx announced the architecture for a new [[ARM Cortex-A9]]-based platform for embedded systems designers, that combines the software programmability of an embedded processor with the hardware flexibility of an FPGA.<ref name="EETimesApril27">Rich Nass, [[EE Times]]. "[http://www.eetimes.com/electronics-products/processors/4115523/Xilinx-puts-ARM-core-into-its-FPGAs Xilinx puts ARM core into its FPGAs] {{Webarchive|url=https://web.archive.org/web/20101123194443/http://www.eetimes.com/electronics-products/processors/4115523/Xilinx-puts-ARM-core-into-its-FPGAs |date=2010-11-23 }}." April 27, 2010. Retrieved February 14, 2011.</ref><ref name="DesignReuseMay3">Steve Leibson, Design-Reuse. "[http://www.design-reuse.com/industryexpertblogs/23302/xilinx-arm-based-extensible-processing-platform.html Xilinx redefines the high-end microcontroller with its ARM-based Extensible Processing Platform - Part 1] {{Webarchive|url=https://web.archive.org/web/20110709014357/http://www.design-reuse.com/industryexpertblogs/23302/xilinx-arm-based-extensible-processing-platform.html |date=2011-07-09 }}." May 3, 2010. Retrieved February 15, 2011.</ref> The new architecture abstracts much of the hardware burden away from the [[embedded software]] developers' point of view, giving them an unprecedented level of control in the development process.<ref name="EETimesApril28">Toni McConnel, [[EE Times]]. "[http://www.eetimes.com/electronics-products/processors/4115537/ESC--Xilinx-Extensible-Processing-Platform-combines-best-of-serial-and-parallel-processing Xilinx Extensible Processing Platform combines best of serial and parallel processing] {{Webarchive|url=https://web.archive.org/web/20111024163351/http://www.eetimes.com/electronics-products/processors/4115537/ESC--Xilinx-Extensible-Processing-Platform-combines-best-of-serial-and-parallel-processing|date=2011-10-24}}." April 28, 2010. Retrieved February 14, 2011.</ref><ref name="FPGABlogApril27">Ken Cheung, FPGA Blog. "[http://fpgablog.com/posts/arm-cortex-mpcore/ Xilinx Extensible Processing Platform for Embedded Systems] {{Webarchive|url=https://web.archive.org/web/20150108233522/http://fpgablog.com/posts/arm-cortex-mpcore/|date=2015-01-08}}." April 27, 2010. Retrieved February 14, 2011.</ref><ref name="EETimesApril27"/><ref name="DesignReuseMay3"/> With this platform, software developers can leverage their existing system code based on ARM technology and utilize vast off-the-shelf open-source and commercially available software component libraries.<ref name="EETimesApril28"/><ref name="FPGABlogApril27"/><ref name="EETimesApril27"/><ref name="DesignReuseMay3"/> Because the system boots an [[Operating system|OS]] at reset, software development can get under way quickly within familiar development and debug environments using tools such as [[ARM architecture family|ARM]]'s RealView development suite and related third-party tools, Eclipse-based IDEs, GNU, the Xilinx Software Development Kit and others.<ref name="EETimesApril28"/><ref name="FPGABlogApril27"/><ref name="EETimesApril27"/><ref name="DesignReuseMay3"/> In early 2011, Xilinx began shipping the Zynq-7000 SoC platform immerses ARM multi-cores, programmable logic fabric, DSP data paths, memories and [[Input/output|I/O]] functions in a dense and configurable mesh of interconnect.<ref name="EETimesMarch1">Colin Holland, [[EE Times]]. "[http://www.eetimes.com/electronics-news/4213637/Xilinx-provides-first-product-details-for-EPP-ARM-based-devices Xilinx provides details on ARM-based devices] {{Webarchive|url=https://web.archive.org/web/20111225132754/http://www.eetimes.com/electronics-news/4213637/Xilinx-provides-first-product-details-for-EPP-ARM-based-devices |date=2011-12-25 }}." March 1, 2011. Retrieved March 1, 2011.</ref><ref name="EmbeddedWorldMarch1">Laura Hopperton, Newelectronics. "[http://www.newelectronics.co.uk/electronics-news/embedded-world-xilinx-introduces-industrys-first-extensible-processing-platform/31861/ Embedded world: Xilinx introduces 'industry's first' extensible processing platform] {{Webarchive|url=https://web.archive.org/web/20171207013158/http://www.newelectronics.co.uk/electronics-news/embedded-world-xilinx-introduces-industrys-first-extensible-processing-platform/31861/ |date=2017-12-07 }}." March 1, 2011. Retrieved March 1, 2011.</ref> The platform targets embedded designers working on market applications that require multi-functionality and real-time responsiveness, such as automotive driver assistance, intelligent video surveillance, industrial automation, aerospace and defense, and next-generation wireless.<ref name="EETimesApril28"/><ref name="FPGABlogApril27"/><ref name="EETimesApril27"/><ref name="DesignReuseMay3"/>

Following the introduction of its 28&nbsp;nm 7-series FPGAs, Xilinx revealed that several of the highest-density parts in those FPGA product lines will be constructed using multiple dies in one package, employing technology developed for 3D construction and stacked-die assemblies.<ref name=ednEurope>EDN Europe. "[http://www.edn-europe.com/xilinxadoptsstackeddie3dpackaging+article+4461+Europe.html Xilinx adopts stacked-die 3D packaging] {{webarchive |url=https://web.archive.org/web/20110219182606/http://www.edn-europe.com/xilinxadoptsstackeddie3dpackaging+article+4461+Europe.html |date=February 19, 2011 }}." November 1, 2010. Retrieved May 12, 2011.</ref><ref name=lawrence>{{cite web |url=http://www.theinquirer.net/inquirer/news/1811460/fpga-manufacturer-claims-beat-moores-law |author=Lawrence Latif |title=FPGA manufacturer claims to beat Moore's Law |date=October 27, 2010 |work=[[The Inquirer]] |url-status=unfit |archive-url=https://web.archive.org/web/20111121043259/http://www.theinquirer.net/inquirer/news/1811460/fpga-manufacturer-claims-beat-moores-law |archive-date=2011-11-21 }}</ref> The company's stacked silicon interconnect (SSI) technology stacks several (three or four) active FPGA dies side by side on a silicon [[interposer]]&nbsp;– a single piece of silicon that carries passive interconnect. The individual FPGA dies are conventional, and are flip-chip mounted by microbumps on to the interposer. The interposer provides direct interconnect between the FPGA dies, with no need for transceiver technologies such as high-speed [[SerDes]].<ref name=ednEurope/><ref name=lawrence/><ref>Clive Maxfield, EETimes. "[http://www.eetimes.com/electronics-blogs/other/4210170/Xilinx-multi-FPGA-provides-mega-boost-re-capacity--performance--and-power-efficiency- Xilinx multi-FPGA provides mega-boost re capacity, performance, and power efficiency!] {{Webarchive|url=https://web.archive.org/web/20101031130715/http://www.eetimes.com/electronics-blogs/other/4210170/Xilinx-multi-FPGA-provides-mega-boost-re-capacity--performance--and-power-efficiency- |date=2010-10-31 }}." October 27, 2010. Retrieved May 12, 2011.</ref> In October 2011, Xilinx shipped the first FPGA to use the new technology, the Virtex-7 2000T FPGA, which includes 6.8 billion transistors and 20 million ASIC gates.<ref name=don1025>Don Clark, The Wall Street Journal. "[https://blogs.wsj.com/digits/2011/10/25/xilinx-says-four-chips-act-like-one-giant/?KEYWORDS=Xilinx Xilinx Says Four Chips Act Like One Giant] {{Webarchive|url=https://web.archive.org/web/20180612143245/https://blogs.wsj.com/digits/2011/10/25/xilinx-says-four-chips-act-like-one-giant/?KEYWORDS=Xilinx |date=2018-06-12 }}." October 25, 2011. Retrieved November 18, 2011.</ref><ref name=clive1025>Clive Maxfield, EETimes. "[http://www.eetimes.com/electronics-news/4230048/Xilinx-announces-world-s-highest-capacity-FPGA Xilinx tips world’s highest capacity FPGA] {{Webarchive|url=https://web.archive.org/web/20111127172525/http://www.eetimes.com/electronics-news/4230048/Xilinx-announces-world-s-highest-capacity-FPGA |date=2011-11-27 }}." October 25, 2011. Retrieved November 18, 2011.</ref><ref name=david1025>David Manners, Electronics Weekly. "[http://www.electronicsweekly.com/Articles/25/10/2011/52110/xilinx-launches-20m-asic-gate-stacked-silicon-fpga.htm Xilinx launches 20m ASIC gate stacked silicon FPGA] {{Webarchive|url=https://web.archive.org/web/20130116054207/http://www.electronicsweekly.com/Articles/25/10/2011/52110/xilinx-launches-20m-asic-gate-stacked-silicon-fpga.htm |date=2013-01-16 }}." October 25, 2011. Retrieved November 18, 2011.</ref><ref name="scieng1026">Tim Pietruck, SciEngines GmbH. "[http://www.sciengines.com/company/news-a-events.html] {{Webarchive|url=https://web.archive.org/web/20111218192558/http://www.sciengines.com/company/news-a-events.html|date=2011-12-18}}." December 21, 2011 - RIVYERA-V7 2000T FPGA computer with the newest and largest Xilinx Virtex-7</ref> The following spring, Xilinx used 3D technology to ship the Virtex-7 HT, the industry's first heterogeneous FPGAs, which combine high bandwidth FPGAs with a maximum of sixteen 28&nbsp;Gbit/s and seventy-two 13.1&nbsp;Gbit/s transceivers to reduce power and size requirements for key Nx100G and 400G line card applications and functions.<ref>Tiernan Ray, Barrons. "[http://blogs.barrons.com/techtraderdaily/2012/05/30/xilinx-3-d-chip-a-route-to-more-complex-semiconductors./ Xilinx: 3-D Chip a Route to More Complex Semiconductors] {{Webarchive|url=https://web.archive.org/web/20150927033455/http://blogs.barrons.com/techtraderdaily/2012/05/30/xilinx-3-d-chip-a-route-to-more-complex-semiconductors./ |date=2015-09-27 }}." May 30, 2012. Retrieved Jan 9, 2013.</ref><ref>Loring Wirbel, EDN. "[http://www.fpgagurus.edn.com/blog/fpga-gurus-blog/xilinx-virtex-7-ht-devices-use-3d-stacking-high-end-communication-edge Xilinx Virtex-7 HT devices use 3D stacking for a high-end communication edge] {{webarchive|url=https://web.archive.org/web/20130116054218/http://www.fpgagurus.edn.com/blog/fpga-gurus-blog/xilinx-virtex-7-ht-devices-use-3d-stacking-high-end-communication-edge |date=2013-01-16 }}." May 30, 2012. Retrieved Jan 9, 2013.</ref>

In January 2011, Xilinx acquired design tool firm AutoESL Design Technologies and added System C high-level design for its 6- and 7-series FPGA families.<ref name="EETimesJan31">Dylan McGrath, [[EE Times]]. "[http://www.eetimes.com/electronics-news/4212668/Xilinx-buys-high-level-synthesis-EDA-vendor Xilinx buys high-level synthesis EDA vendor] {{Webarchive|url=https://web.archive.org/web/20111017170928/http://www.eetimes.com/electronics-news/4212668/Xilinx-buys-high-level-synthesis-EDA-vendor |date=2011-10-17 }}." January 31, 2011. Retrieved February 15, 2011.</ref> The addition of AutoESL tools extended the design community for FPGAs to designers more accustomed to designing at a higher level of abstraction using [[C (programming language)|C]], [[C++]] and System C.<ref name="ElectronicsWeelyJan31">Richard Wilson, ElectronicsWeekly.com. "[http://www.electronicsweekly.com/Articles/2011/01/31/50386/xilinx-acquires-esl-firm-to-make-fpgas-easier-to-use.htm Xilinx acquires ESL firm to make FPGAs easier to use] {{Webarchive|url=https://web.archive.org/web/20110710181038/http://www.electronicsweekly.com/Articles/2011/01/31/50386/xilinx-acquires-esl-firm-to-make-fpgas-easier-to-use.htm |date=2011-07-10 }}." January 31, 2011. Retrieved February 15, 2011.</ref>

In April 2012, Xilinx introduced a revised version of its toolset for programmable systems, called [[Xilinx Vivado|Vivado Design Suite]]. This IP and system-centric design software supports newer high capacity devices, and speeds the design of programmable logic and I/O.<ref>Brian Bailey, [[EE Times]]. "[http://www.eetimes.com/electronics-products/ip-eda-products/4371701/Second-generation-for-FPGA-software Second generation for FPGA software] {{Webarchive|url=https://web.archive.org/web/20130116073612/http://www.eetimes.com/electronics-products/ip-eda-products/4371701/Second-generation-for-FPGA-software |date=2013-01-16 }}." Apr 25, 2012. Retrieved Jan 3, 2013.</ref> Vivado provides faster integration and implementation for programmable systems into devices with 3D stacked silicon interconnect technology, ARM processing systems, analog mixed signal (AMS), and many [[Semiconductor intellectual property core|semiconductor intellectual property]] (IP) cores.<ref name="EDN15Jun2012">EDN. "[http://www.edn.com/electronics-products/other/4375467/The-Vivado-Design-Suite-accelerates-programmable-systems-integration-by-up-to-4X The Vivado Design Suite accelerates programmable systems integration and implementation by up to 4X] {{Webarchive|url=https://web.archive.org/web/20130116054344/http://www.edn.com/electronics-products/other/4375467/The-Vivado-Design-Suite-accelerates-programmable-systems-integration-by-up-to-4X |date=2013-01-16 }}." Jun 15, 2012. Retrieved Jan 3, 2013.</ref>

In July 2019, Xilinx acquired NGCodec, developers of [[FPGA]] [[Hardware acceleration|accelerated]] video encoders for [[Video hosting service|video streaming]], [[cloud gaming]] and cloud [[mixed reality]] services. NGCodec video encoders include support for [[H.264/MPEG-4 AVC|H.264/AVC]], [[HEVC|H.265/HEVC]], [[VP9]] and [[AV1]], with planned future support for [[Versatile Video Coding|H.266/VVC]] and AV2.<ref>{{Cite web|url=https://forums.xilinx.com/t5/Xilinx-Xclusive-Blog/Buffer-Be-Gone-Xilinx-Acquires-NGCodec-to-Deliver-High-Quality/ba-p/990357|title=Buffer Be Gone! Xilinx Acquires NGCodec to Deliver High-Quality, Efficient Cloud Video Encoding|date=2019-07-01|website=forums.xilinx.com|language=en|access-date=2019-07-02|archive-date=2019-07-02|archive-url=https://web.archive.org/web/20190702110951/https://forums.xilinx.com/t5/Xilinx-Xclusive-Blog/Buffer-Be-Gone-Xilinx-Acquires-NGCodec-to-Deliver-High-Quality/ba-p/990357|url-status=live}}</ref><ref>{{Cite web|url=https://ngcodec.com/|title=NGCodec|website=NGCodec|language=en-US|access-date=2019-07-02|archive-date=2019-07-01|archive-url=https://web.archive.org/web/20190701182423/https://ngcodec.com/|url-status=live}}</ref>

In May 2020, Xilinx installed its first Adaptive Compute Cluster (XACC) at ETH Zurich in Switzerland.<ref name=":5">{{Cite web|title=Xilinx to establish adaptive compute research clusters|url=https://www.newelectronics.co.uk/electronics-news/xilinx-to-establish-adaptive-compute-research-clusters/226811/|url-status=live|access-date=2020-06-09|website=NewsElectronics|date=5 June 2020 |archive-date=2020-06-09|archive-url=https://web.archive.org/web/20200609154751/https://www.newelectronics.co.uk/electronics-news/xilinx-to-establish-adaptive-compute-research-clusters/226811/}}</ref> The XACCs provide infrastructure and funding to support research in adaptive compute acceleration for high performance computing (HPC).<ref name=":5" /> The clusters include high-end servers, Xilinx Alveo accelerator cards, and high speed networking.<ref>{{Cite web|last=Brueckner|first=Rich|date=2020-05-05|title=Xilinx Establishes FPGA Adaptive Compute Clusters at Leading Universities|url=https://insidehpc.com/2020/05/xilinx-establishes-fpga-adaptive-compute-clusters-at-leading-universities/|access-date=2020-06-23|website=insideHPC|language=en-US|archive-date=2020-06-26|archive-url=https://web.archive.org/web/20200626140054/https://insidehpc.com/2020/05/xilinx-establishes-fpga-adaptive-compute-clusters-at-leading-universities/|url-status=live}}</ref> Three other XACCs will be installed at the [[University of California, Los Angeles]] (UCLA); the [[University of Illinois at Urbana Champaign]] (UIUC); and the [[National University of Singapore]] (NUS).<ref name=":5" /><ref>{{Cite web|date=2020-05-06|title=Xilinx forms university adaptive compute research clusters|url=https://www.eenewsembedded.com/news/xilinx-forms-university-adaptive-compute-research-clusters|url-status=live|archive-url=https://web.archive.org/web/20200618153831/https://www.eenewsembedded.com/news/xilinx-forms-university-adaptive-compute-research-clusters|archive-date=2020-06-18|access-date=2020-06-17|website=eeNews Embedded|language=en}}</ref>