Editing Xilinx (section)

==Family lines of products==
[[File:ZyXEL ZyAIR B-2000 - Xilinx XC9536XL-8842.jpg|thumb|CPLD Xilinx XC9536XL]]

Before 2010, Xilinx offered two main FPGA families: the high-performance [[Virtex (FPGA)|Virtex]] series and the high-volume Spartan series, with a cheaper EasyPath option for ramping to volume production.<ref name="thirtythree"/> The company also provides two [[Complex programmable logic device|CPLD]] lines: the CoolRunner and the 9500 series. Each model series has been released in multiple generations since its launch.<ref name="Brown">Stephen Brown and Johnathan Rose, University of Toronto. “[https://www.eecg.toronto.edu/~jayar/pubs/brown/survey.pdf Architecture of FPGAs and CPLDs: A Tutorial] {{Webarchive|url=https://web.archive.org/web/20100709205713/http://www.eecg.toronto.edu/~jayar/pubs/brown/survey.pdf |date=2010-07-09 }}.” Retrieved June 10, 2010.</ref> With the introduction of its 28&nbsp;nm FPGAs in June 2010, Xilinx replaced the high-volume Spartan family with the Kintex family and the low-cost Artix family.<ref name="EET">[[EE Times]]. “[https://www.eetimes.com/electronics-products/fpga-pld-products/4200530/Xilinx-to-offer-three-classes-of-FPGAs-at-28-nm Xilinx to offer three classes of FPGAs at 28-nm] {{Webarchive|url=https://web.archive.org/web/20101123194437/http://www.eetimes.com/electronics-products/fpga-pld-products/4200530/Xilinx-to-offer-three-classes-of-FPGAs-at-28-nm |date=2010-11-23 }}.” June 21, 2010. Retrieved September 23, 2010.</ref><ref name="Morris">Kevin Morris, FPGA Journal. “[http://www.techfocusmedia.net/fpgajournal/feature_articles/20100622-virtex/ Veni! Vidi! Virtex! (and Kintex and Artix Too)] {{webarchive|url=https://web.archive.org/web/20101123043600/http://www.techfocusmedia.net/fpgajournal/feature_articles/20100622-virtex/|date=November 23, 2010}}.” June 21, 2010. Retrieved September 23, 2010.</ref>

Xilinx's newer FPGA products use a [[high-κ dielectric|High-κ/Metal-Gate Stack]] (HKMG) process, which reduces static power consumption while increasing logic capacity.<ref name="harris">Daniel Harris, Electronic Design. “[https://electronicdesign.com/article/digital/if-only-the-original-spartans-could-have-thrived-o.aspx If Only the Original Spartans Could Have Thrived On So Little Power] {{webarchive|url=https://web.archive.org/web/20111205015520/http://electronicdesign.com/article/digital/if-only-the-original-spartans-could-have-thrived-o.aspx|date=2011-12-05}}.” February 27, 2008. Retrieved January 20, 2008.</ref> In 28&nbsp;nm devices, static power accounts for much and sometimes most of the total power dissipation. Virtex-6 and Spartan-6 FPGA families are said to consume 50 percent less power, and have up to twice the logic capacity compared to the previous generation of Xilinx FPGAs.<ref name="eweekly"/><ref name="eetimes">Peter Clarke, [[EE Times]], "[https://www.eetimes.com/news/latest/showArticle.jhtml?articleID=213000271 Xilinx launches Spartan-6, Virtex-6 FPGAs] {{Webarchive|url=https://web.archive.org/web/20130523202018/http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=213000271 |date=2013-05-23 }}." February 2, 2009. Retrieved February 2, 2009</ref><ref name="EDN">Ron Wilson, EDN, "[https://www.edn.com/article/CA6633947.html Xilinx FPGA introductions hint at new realities] {{webarchive|url=https://archive.today/20130122084337/http://www.edn.com/article/CA6633947.html |date=2013-01-22 }}." February 2, 2009. Retrieved on February 2, 2009.</ref>

In June 2010, Xilinx introduced the Xilinx 7 series: the Virtex-7, Kintex-7, and Artix-7 families, promising improvements in system power, performance, capacity, and price. These new FPGA families are manufactured using [[TSMC]]'s 28&nbsp;nm HKMG process.<ref name="xilinx7">Brent Przybus, Xilinx, "[https://www.xilinx.com/support/documentation/white_papers/wp373_V7_K7_A7_Devices.pdf Xilinx Redefines Power, Performance, and Design Productivity with Three New 28 nm FPGA Families: Virtex-7, Kintex-7, and Artix-7 Devices] {{Webarchive|url=https://web.archive.org/web/20100704231736/http://www.xilinx.com/support/documentation/white_papers/wp373_V7_K7_A7_Devices.pdf |date=2010-07-04 }}." June 21, 2010. Retrieved on June 22, 2010.</ref> The 28&nbsp;nm series 7 devices feature a 50 percent power reduction compared to the company's 40&nbsp;nm devices and offer capacity of up to 2 million logic cells.<ref name= EET /> Less than one year after announcing the 7 series 28&nbsp;nm FPGAs, Xilinx shipped the world's first 28&nbsp;nm FPGA device, the Kintex-7.<ref>Convergedigest. "[https://www.convergedigest.com/Silicon/siliconarticle.asp?ID=32793&ctgy=%27%20target Xilinx Ships First 28nm FPGA]{{Dead link|date=August 2018 |bot=InternetArchiveBot |fix-attempted=yes }}." Mar 18, 2011. Retrieved May 11, 2012.</ref><ref>Clive Maxfield, EETimes. "[https://www.eetimes.com/electronics-products/electronic-product-reviews/fpga-pld-products/4214345/Xilinx-ships-first-28nm-Kintex-7-FPGAs Xilinx ships first 28nm Kintex-7 FPGAs] {{Webarchive|url=https://web.archive.org/web/20120413031515/http://www.eetimes.com/electronics-products/electronic-product-reviews/fpga-pld-products/4214345/Xilinx-ships-first-28nm-Kintex-7-FPGAs |date=2012-04-13 }}." March 21, 2011. Retrieved May 11, 2012.</ref> In March 2011, Xilinx introduced the Zynq-7000 family, which integrates a complete [[ARM Cortex-A9]] MPCore processor-based system on a 28&nbsp;nm FPGA for system architects and embedded software developers.<ref name="EETimesMarch1"/><ref name="EmbeddedWorldMarch1"/> In May 2017, Xilinx expanded the 7 Series with the production of the Spartan-7 family.<ref name="spartan7announce">Company Release. "[https://www.xilinx.com/news/press/2015/xilinx-announces-the-spartan-7-fpga-family.html Xilinx Announces the Spartan-7 FPGA Family] {{Webarchive|url=https://web.archive.org/web/20180507085509/https://www.xilinx.com/news/press/2015/xilinx-announces-the-spartan-7-fpga-family.html |date=2018-05-07 }}." November 19, 2015.</ref><ref name="spartan7prod">Company Release. "[https://www.xilinx.com/news/press/2017/xilinx-spartan-7-fpgas-now-in-production.html Xilinx Spartan-7 FPGAs Now in Production] {{Webarchive|url=https://web.archive.org/web/20180507085446/https://www.xilinx.com/news/press/2017/xilinx-spartan-7-fpgas-now-in-production.html |date=2018-05-07 }}." May 09, 2017.</ref>

In Dec, 2013, Xilinx introduced the UltraScale series: Virtex UltraScale and Kintex UltraScale families. These new FPGA families are manufactured by [[TSMC]] in its 20&nbsp;nm planar process.<ref name=TSMC>{{cite web |url=https://www.xilinx.com/publications/prod_mktg/Xilinx-UltraScale-Backgrounder.pdf |title=Archived copy |access-date=2014-05-13 |url-status=dead |archive-url=https://web.archive.org/web/20140707070659/http://www.xilinx.com/publications/prod_mktg/Xilinx-UltraScale-Backgrounder.pdf |archive-date=2014-07-07 }}</ref> At the same time it announced an UltraScale SoC architecture, called Zynq UltraScale+ [[MPSoC]], in TSMC 16&nbsp;nm FinFET process.<ref name="TSMC_16">{{cite web|url=https://www.xilinx.com/products/technology/ultrascale-mpsoc/index.htm|title=UltraScale MPSoC Architecture|access-date=August 16, 2015|archive-date=October 12, 2014|archive-url=https://web.archive.org/web/20141012035155/http://www.xilinx.com/products/technology/ultrascale-mpsoc/index.htm|url-status=live}}</ref>

In March 2021, Xilinx announced a new cost-optimized portfolio with Artix and Zynq UltraScale+ devices, fabricated on TSMC's 16&nbsp;nm process.<ref>{{Cite web|date=2021-03-16|title=Xilinx Back in the Cost-Optimized Game|url=https://www.eejournal.com/article/xilinx-back-in-the-cost-optimized-game/|access-date=2021-04-02|website=EEJournal|language=en-US}}</ref>

===Virtex family===
{{main|Virtex (FPGA)}}
The [[Virtex (FPGA)|Virtex]] series of FPGAs have integrated features that include [[FIFO (computing and electronics)|FIFO]] and ECC logic, DSP blocks, [[PCI-Express]] controllers, [[Ethernet]] [[MAC address|MAC]] blocks, and high-speed transceivers. In addition to FPGA logic, the Virtex series includes embedded fixed function hardware for commonly used functions such as multipliers, memories, serial transceivers and microprocessor cores.<ref name="Virtex1">Ron Wilson, EDN. "[http://www.edn.com/article/459148-Xilinx_FPGA_introductions_hint_at_new_realities.php Xilinx FPGA introductions hint at new realities] {{webarchive|url=https://web.archive.org/web/20110525031230/http://www.edn.com/article/459148-Xilinx_FPGA_introductions_hint_at_new_realities.php |date=May 25, 2011 }}." February 2, 2009 Retrieved June 10, 2010.</ref> These capabilities are used in applications such as wired and wireless infrastructure equipment, advanced medical equipment, test and measurement, and defense systems.<ref name="Virtex2">Design & Reuse. "[http://www.design-reuse.com/news/19988/xilinx-virtex-6-fpga.html New Xilinx Virtex-6 FPGA Family Designed to Satisfy Insatiable Demand for Higher Bandwidth and Lower Power Systems] {{Webarchive|url=https://web.archive.org/web/20100103040550/http://www.design-reuse.com/news/19988/xilinx-virtex-6-fpga.html |date=2010-01-03 }}." February 2, 2009. Retrieved June 10, 2010.</ref>

The Virtex 7 family, is based on a 28&nbsp;nm design and is reported to deliver a two-fold system performance improvement at 50 percent lower power compared to previous generation Virtex-6 devices. In addition, Virtex-7 doubles the memory bandwidth compared to previous generation Virtex FPGAs with 1866&nbsp;Mbit/s memory interfacing performance and over two million logic cells.<ref name="EET" /><ref name="Morris" />

In 2011, Xilinx began shipping sample quantities of the Virtex-7 2000T "3D FPGA", which combines four smaller FPGAs into a single package by placing them on a special silicon interconnection pad (called an [[interposer]]) to deliver 6.8 billion transistors in a single large chip. The interposer provides 10,000 data pathways between the individual FPGAs — roughly 10 to 100 times more than would usually be available on a board – to create a single FPGA.<ref name="don1025" /><ref name="clive1025" /><ref name="david1025" /> In 2012, using the same 3D technology, Xilinx introduced initial shipments of their Virtex-7 H580T FPGA, a heterogeneous device, so called because it comprises two FPGA dies and one 8-channel 28&nbsp;Gbit/s transceiver die in the same package.<ref name="ElectronicProductNews15May2012"/>

The Virtex-6 family is built on a 40&nbsp;nm process for compute-intensive electronic systems, and the company claims it consumes 15 percent less power and has 15 percent improved performance over competing 40&nbsp;nm FPGAs.<ref>Company Release. "[http://press.xilinx.com/phoenix.zhtml?c=212763&p=irol-newsArticle&ID=1250609 New Xilinx Virtex-6 FPGA Family Designed to Satisfy Insatiable Demand for Higher Bandwidth and Lower Power Systems]." February 2, 2009. Retrieved February 2, 2009.</ref>

The Virtex-5 LX and the LXT are intended for logic-intensive applications, and the Virtex-5 SXT is for DSP applications.<ref>DSP DesignLine. "[http://www.industrialcontroldesignline.com/products/208404026' Analysis: Xilinx debuts Virtex-5 FXT, expands SXT] {{Webarchive|url=https://web.archive.org/web/20201011022346/https://www.informatech.com/ |date=2020-10-11 }}." June 13, 2008. Retrieved January 20, 2008.</ref> With the Virtex-5, Xilinx changed the logic fabric from four-input LUTs to six-input LUTs. With the increasing complexity of combinational logic functions required by SoC designs, the percentage of combinational paths requiring multiple four-input LUTs had become a performance and routing bottleneck. The six-input LUT represented a tradeoff between better handling of increasingly complex combinational functions, at the expense of a reduction in the absolute number of LUTs per device. The Virtex-5 series is a 65&nbsp;nm design [[Semiconductor device fabrication|fabricated]] in 1.0V, triple-oxide process technology.<ref name="Virtex3">National Instruments. "[http://zone.ni.com/devzone/cda/tut/p/id/7440#toc1 Advantages of the Xilinx Virtex-5 FPGA] {{Webarchive|url=https://web.archive.org/web/20100726040646/http://zone.ni.com/devzone/cda/tut/p/id/7440#toc1 |date=2010-07-26 }}." June 17, 2009. Retrieved June 29, 2010.</ref>

Legacy Virtex devices (Virtex, Virtex-II, Virtex-II Pro, Virtex 4) are still available, but are not recommended for use in new designs.

===Kintex===
[[File:Xilinx_Kintex7_XCKU025_on_matrox_grabber.jpg|thumb|A Xilinx Kintex UltraScale FPGA (XCKU025-FFVA1156) on a [[Matrox]] [[frame grabber]]]]
The Kintex-7 family is the first Xilinx mid-range FPGA family that the company claims delivers Virtex-6 family performance at less than half the price while consuming 50 percent less power. The Kintex family includes high-performance 12.5&nbsp;Gbit/s or lower-cost optimized 6.5&nbsp;Gbit/s serial connectivity, memory, and logic performance required for applications such as high volume [[10G]] optical wired communication equipment, and provides a balance of signal processing performance, power consumption and cost to support the deployment of [[Long Term Evolution]] (LTE) wireless networks.<ref name="EET" /><ref name="Morris" />

In August 2018, SK Telecom deployed Xilinx Kintex UltraScale FPGAs as their artificial intelligence accelerators at their data centers in South Korea.<ref name="kintex">{{cite web |url=https://medium.com/@fudo.abazovic/sk-telecom-deploys-xilinx-fpgas-for-ai-d5abea8916b4 |title=SK Telecom deploys Xilinx FPGAs for AI |date=19 August 2018 |access-date=2020-03-02 |archive-date=2020-03-02 |archive-url=https://web.archive.org/web/20200302215729/https://medium.com/@fudo.abazovic/sk-telecom-deploys-xilinx-fpgas-for-ai-d5abea8916b4 |url-status=live }}</ref> The FPGAs run SKT's automatic speech-recognition application to accelerate Nugu, SKT's voice-activated assistant.<ref name="kintex" /><ref>{{cite news |url=https://www.datacenterdynamics.com/news/sk-telecom-deploys-xilinx-fpgas-in-its-data-center/ |title=SSK Telecom deploys Xilinx FPGAs in its data center |access-date=2020-03-02 |archive-date=2020-10-11 |archive-url=https://web.archive.org/web/20201011022347/https://www.datacenterdynamics.com/en/news/sk-telecom-deploys-xilinx-fpgas-in-its-data-center/ |url-status=live }}</ref>

In July, 2020 Xilinx made the latest addition to their Kintex family, 'KU19P FPGA' which delivers more logic fabric and embedded memory<ref>{{Cite web |url=https://www.ept.ca/products/fpga-boosts-logic-fabric-embedded-memory/ |title=FPGA boosts logic fabric, embedded memory - Electronic Products & TechnologyElectronic Products & Technology |date=July 2020 |access-date=2020-08-05 |archive-date=2020-08-04 |archive-url=https://web.archive.org/web/20200804212616/https://www.ept.ca/products/fpga-boosts-logic-fabric-embedded-memory/ |url-status=live }}</ref>

===Artix===
[[File:Xilinx XC7A35T.jpg|thumb|A Artix-7 FPGA (XC7A35T-CSG325)]]
The Artix-7 family delivers 50 percent lower power and 35 percent lower cost compared to the Spartan-6 family and is based on the unified Virtex-series architecture. The Artix family is designed to address the small form factor and low-power performance requirements of battery-powered portable [[ultrasound]] equipment, commercial digital camera lens control, and military [[avionics]] and communications equipment.<ref name="EET" /><ref name="Morris" /> With the introduction of the Spartan-7 family in 2017, which lack high-bandwidth transceivers, the Artix-7's was clarified as being the "transceiver optimized" member.<ref name="costOptimizedPortfolio2017">Company Website. "[https://www.xilinx.com/products/silicon-devices/cost-optimized-portfolio.html Cost-Optimized Portfolio] {{Webarchive|url=https://web.archive.org/web/20170705133028/https://www.xilinx.com/products/silicon-devices/cost-optimized-portfolio.html |date=2017-07-05 }}." Retrieved July 5, 2017.</ref>

===Zynq===
[[File:Adapteva_Parallella_DK02_-_Zynq_(15455173526).png|thumb|A Zynq-7000 (XC7Z010-CLG400) on a [[Adapteva]] Parallella [[single-board computer]]]]
The Zynq-7000 family of [[System on a chip|SoCs]] addresses high-end embedded-system applications, such as video surveillance, automotive-driver assistance, next-generation wireless, and factory automation.<ref name="EETimesMarch1"/><ref name="EmbeddedWorldMarch1"/><ref name="EDNMarch1">Mike Demler, EDN. "[http://www.edn.com/article/517141-Xilinx_integrates_dual_ARM_Cortex_A9_MPCore_with_28_nm_low_power_programmable_logic.php Xilinx integrates dual ARM Cortex-A9 MPCore with 28-nm, low-power programmable logic] {{webarchive|url=https://archive.today/20130122011606/http://www.edn.com/article/517141-Xilinx_integrates_dual_ARM_Cortex_A9_MPCore_with_28_nm_low_power_programmable_logic.php |date=2013-01-22 }}." March 1, 2011. Retrieved March 1, 2011.</ref> Zynq-7000 integrate a complete [[ARM Cortex-A9]] MPCore-processor-based 28&nbsp;nm system. The Zynq architecture differs from previous marriages of programmable logic and embedded processors by moving from an FPGA-centric platform to a processor-centric model.<ref name="EETimesMarch1"/><ref name="EmbeddedWorldMarch1"/><ref name="EDNMarch1"/> For software developers, Zynq-7000 appear the same as a standard, fully featured [[ARM architecture family|ARM]] processor-based [[System on a chip|system-on-chip (SoC)]], booting immediately at power-up and capable of running a variety of operating systems independently of the programmable logic.<ref name="EETimesMarch1"/><ref name="EmbeddedWorldMarch1"/><ref name="EDNMarch1"/> In 2013, Xilinx introduced the Zynq-7100, which integrates [[digital signal processing]] (DSP) to meet emerging programmable systems integration requirements of wireless, broadcast, medical and military applications.<ref>Clive Maxfield, EETimes. "[http://www.eetimes.com/electronics-products/electronic-product-reviews/fpga-pld-products/4410302/Xilinx-unveils-new-Zynq-7100-All-Programmable-SoCs Xilinx unveils new Zynq-7100 All Programmable SoCs] {{Webarchive|url=https://web.archive.org/web/20130326190106/http://www.eetimes.com/electronics-products/electronic-product-reviews/fpga-pld-products/4410302/Xilinx-unveils-new-Zynq-7100-All-Programmable-SoCs |date=2013-03-26 }}." Mar 20, 2013. Retrieved Jun 3, 2013.</ref>

The new Zynq-7000 product family posed a key challenge for system designers, because Xilinx ISE design software had not been developed to handle the capacity and complexity of designing with an FPGA with an ARM core.<ref name="EETimes25Apr2012"/><ref name="EDN15Jun2012"/> Xilinx's new [[Xilinx Vivado|Vivado Design Suite]] addressed this issue, because the software was developed for higher capacity FPGAs, and it included [[high level synthesis]] (HLS) functionality that allows engineers to compile the co-processors from a [[C (programming language)|C]]-based description.<ref name="EETimes25Apr2012"/><ref name=EDN15Jun2012/>

The [[AXIOM (camera)|AXIOM]],<ref>{{cite web |url=https://www.apertus.org/alpha_prototype |title=Axiom Alpha |access-date=2014-06-20 |archive-date=2014-07-02 |archive-url=https://web.archive.org/web/20140702114027/https://www.apertus.org/alpha_prototype |url-status=live }}</ref> the world's first [[digital cinema camera]] that is [[open source hardware]], contains a Zynq-7000.<ref>{{cite web |url=https://forums.xilinx.com/t5/Xcell-Daily-Blog/Zynq-based-Axiom-Alpha-open-4K-cine-camera-proto-debuts-in/ba-p/430066 |title=Zynq-based Axiom Alpha open 4K cine camera proto debuts in Vienna hackerspace |date=2014-03-20 |access-date=2014-06-20 |archive-date=2014-08-13 |archive-url=https://web.archive.org/web/20140813105309/http://forums.xilinx.com/t5/Xcell-Daily-Blog/Zynq-based-Axiom-Alpha-open-4K-cine-camera-proto-debuts-in/ba-p/430066 |url-status=live }}</ref>

===Spartan family===
[[File:Fritz!Box Fon WLAN 7270 - Xilinx 3S250E-3338.jpg|thumb|Xilinx 3S250, Spartan-3E FPGA family]]
The Spartan series targets low cost, high-volume applications with a low-power footprint e.g. [[displays]], [[set-top boxes]], [[wireless router]]s and other applications.<ref name="spartan">Daniel Harris, Electronic Design. "[http://electronicdesign.com/Articles/Index.cfm?AD=1&ArticleID=18342 If only the original spartans could have thrived on so little power] {{webarchive|url=https://web.archive.org/web/20090302010210/http://electronicdesign.com/Articles/Index.cfm?AD=1&ArticleID=18342 |date=2009-03-02 }}." February 27, 2008. Retrieved January 20, 2008.</ref>

The Spartan-6 family is built on a 45&nbsp;nm, 9-metal layer, dual-oxide process technology.<ref name="eetimes"/><ref name="spartanrelease">Company Release. "[http://news.prnewswire.com/ViewContent.aspx?ACCT=109&STORY=/www/story/02-02-2009/0004964201&EDATE The low-cost Spartan-6 FPGA family delivers an optimal balance of low risk, low cost, low power, and high performance] {{dead link|date=October 2017|bot=medic}}{{cbignore|bot=medic}}." February 2, 2009.</ref> The Spartan-6 was marketed in 2009 as a low-cost option for automotive, wireless communications, flat-panel display and video surveillance applications.<ref name="spartanrelease"/>

The Spartan-7 family, built on the same 28[[nanometer|nm]] process used in the other 7-Series FPGAs, was announced in 2015,<ref name="spartan7announce"/> and became available in 2017.<ref name="spartan7prod"/> Unlike the Artix-7 family and the "LXT" members of the Spartan-6 family, the Spartan-7 FPGAs lack high-bandwidth transceivers.<ref name="costOptimizedPortfolio2017"/>

===EasyPath===
Because EasyPath devices are identical to the FPGAs that customers are already using the parts can be produced faster and more reliably from the time they are ordered compared to similar competing programs.<ref name="thirtyone">{{cite web |last1=Morris |first1=Kevin |title=Not Bad Die: Xilinx EasyPath Explained |url=https://www.fpgajournal.com/articles_2008/pdf/20080527_easypath.pdf |website=FPGA Journal |access-date=20 January 2008 |archive-url=https://web.archive.org/web/20090327150947/http://www.fpgajournal.com/articles_2008/pdf/20080527_easypath.pdf |archive-date=27 March 2009 |url-status=dead}}</ref>

===Versal===
Versal is Xilinx's 7&nbsp;nm architecture that targets [[heterogeneous computing]] needs in datacenter acceleration applications, in [[artificial intelligence]] acceleration at the [[edge computing|edge]], [[Internet of things]] (IoT) applications and [[embedded computing]].

The Everest program focuses on the Versal Adaptive Compute Acceleration Platform (ACAP), a product category combining a traditional FPGA fabric with an [[ARM architecture|ARM]] [[system on chip]] and a set of [[coprocessor]]s, connected through a [[network on a chip]].<ref name="VB20190618">"[https://venturebeat.com/2019/06/18/xilinx-ships-first-versal-acap-chips-that-adapt-to-ai-programs/ Xilinx ships first Versal ACAP chips that adapt to AI programs] {{Webarchive|url=https://web.archive.org/web/20200521204130/https://venturebeat.com/2019/06/18/xilinx-ships-first-versal-acap-chips-that-adapt-to-ai-programs/ |date=2020-05-21 }}." June 18, 2019. Retrieved Feb  26, 2020.</ref> Xilinx's goal was to reduce the barriers to adoption of FPGAs for accelerated compute-intensive datacenter workloads.<ref name="FBS26Mar2018">Karl Freund, [[Forbes (magazine)]]. "[https://www.forbes.com/sites/moorinsights/2018/03/26/xilinx-everest-enabling-fpga-acceleration-with-acap/#5b2a9b6b342e Xilinx Everest: Enabling FPGA Acceleration With ACAP] {{Webarchive|url=https://web.archive.org/web/20180612144257/https://www.forbes.com/sites/moorinsights/2018/03/26/xilinx-everest-enabling-fpga-acceleration-with-acap/#5b2a9b6b342e |date=2018-06-12 }}." March 26, 2018. Retrieved April 26, 2018.</ref> They are designed for a wide range of applications in the fields of [[big data]] and [[machine learning]], including video transcoding, database querying, data compression, search, [[inference#Inference engines|AI inferencing]], [[machine vision]], [[computer vision]], [[vehicular automation|autonomous vehicles]], [[genomics]], computational storage and network acceleration.<ref name="VB20190618"/>

On April 15, 2020, it was announced that Xilinx would supply its Versal chips to [[Samsung Electronics]] for 5G networking equipment.<ref>"[https://www.platformexecutive.com/news/mobile-telecoms-infrastructure/samsung-to-tap-xilinx-chips-for-5g-network-equipment/ Samsung to tap Xilinx chips for 5G network equipment] {{Webarchive|url=https://web.archive.org/web/20201011022347/https://www.platformexecutive.com/news/mobile-telecoms-infrastructure/samsung-to-tap-xilinx-chips-for-5g-network-equipment/ |date=2020-10-11 }}." Apr 16, 2020. Retrieved April 16, 2020.</ref> In July 2021, Xilinx debuted the Versal HBM, which combines the network interface of the platform with [[High Bandwidth Memory|HBM2e]] memory to alleviate data bottlenecking.<ref>{{cite web |last1=McGregor |first1=Jim |title=Xilinx Ups The Ante In High-Performance Processing With Versal HBM |url=https://www.forbes.com/sites/tiriasresearch/2021/07/15/xilinx-ups-the-ante-in-high-performance-processing-with-versal-hbm/?sh=4d3955f455e1 |website=Forbes |access-date=28 September 2021 |language=en}}</ref>