Editing Xilinx (section)

===Virtex family===
{{main|Virtex (FPGA)}}
The [[Virtex (FPGA)|Virtex]] series of FPGAs have integrated features that include [[FIFO (computing and electronics)|FIFO]] and ECC logic, DSP blocks, [[PCI-Express]] controllers, [[Ethernet]] [[MAC address|MAC]] blocks, and high-speed transceivers. In addition to FPGA logic, the Virtex series includes embedded fixed function hardware for commonly used functions such as multipliers, memories, serial transceivers and microprocessor cores.<ref name="Virtex1">Ron Wilson, EDN. "[http://www.edn.com/article/459148-Xilinx_FPGA_introductions_hint_at_new_realities.php Xilinx FPGA introductions hint at new realities] {{webarchive|url=https://web.archive.org/web/20110525031230/http://www.edn.com/article/459148-Xilinx_FPGA_introductions_hint_at_new_realities.php |date=May 25, 2011 }}." February 2, 2009 Retrieved June 10, 2010.</ref> These capabilities are used in applications such as wired and wireless infrastructure equipment, advanced medical equipment, test and measurement, and defense systems.<ref name="Virtex2">Design & Reuse. "[http://www.design-reuse.com/news/19988/xilinx-virtex-6-fpga.html New Xilinx Virtex-6 FPGA Family Designed to Satisfy Insatiable Demand for Higher Bandwidth and Lower Power Systems] {{Webarchive|url=https://web.archive.org/web/20100103040550/http://www.design-reuse.com/news/19988/xilinx-virtex-6-fpga.html |date=2010-01-03 }}." February 2, 2009. Retrieved June 10, 2010.</ref>

The Virtex 7 family, is based on a 28&nbsp;nm design and is reported to deliver a two-fold system performance improvement at 50 percent lower power compared to previous generation Virtex-6 devices. In addition, Virtex-7 doubles the memory bandwidth compared to previous generation Virtex FPGAs with 1866&nbsp;Mbit/s memory interfacing performance and over two million logic cells.<ref name="EET" /><ref name="Morris" />

In 2011, Xilinx began shipping sample quantities of the Virtex-7 2000T "3D FPGA", which combines four smaller FPGAs into a single package by placing them on a special silicon interconnection pad (called an [[interposer]]) to deliver 6.8 billion transistors in a single large chip. The interposer provides 10,000 data pathways between the individual FPGAs — roughly 10 to 100 times more than would usually be available on a board – to create a single FPGA.<ref name="don1025" /><ref name="clive1025" /><ref name="david1025" /> In 2012, using the same 3D technology, Xilinx introduced initial shipments of their Virtex-7 H580T FPGA, a heterogeneous device, so called because it comprises two FPGA dies and one 8-channel 28&nbsp;Gbit/s transceiver die in the same package.<ref name="ElectronicProductNews15May2012"/>

The Virtex-6 family is built on a 40&nbsp;nm process for compute-intensive electronic systems, and the company claims it consumes 15 percent less power and has 15 percent improved performance over competing 40&nbsp;nm FPGAs.<ref>Company Release. "[http://press.xilinx.com/phoenix.zhtml?c=212763&p=irol-newsArticle&ID=1250609 New Xilinx Virtex-6 FPGA Family Designed to Satisfy Insatiable Demand for Higher Bandwidth and Lower Power Systems]." February 2, 2009. Retrieved February 2, 2009.</ref>

The Virtex-5 LX and the LXT are intended for logic-intensive applications, and the Virtex-5 SXT is for DSP applications.<ref>DSP DesignLine. "[http://www.industrialcontroldesignline.com/products/208404026' Analysis: Xilinx debuts Virtex-5 FXT, expands SXT] {{Webarchive|url=https://web.archive.org/web/20201011022346/https://www.informatech.com/ |date=2020-10-11 }}." June 13, 2008. Retrieved January 20, 2008.</ref> With the Virtex-5, Xilinx changed the logic fabric from four-input LUTs to six-input LUTs. With the increasing complexity of combinational logic functions required by SoC designs, the percentage of combinational paths requiring multiple four-input LUTs had become a performance and routing bottleneck. The six-input LUT represented a tradeoff between better handling of increasingly complex combinational functions, at the expense of a reduction in the absolute number of LUTs per device. The Virtex-5 series is a 65&nbsp;nm design [[Semiconductor device fabrication|fabricated]] in 1.0V, triple-oxide process technology.<ref name="Virtex3">National Instruments. "[http://zone.ni.com/devzone/cda/tut/p/id/7440#toc1 Advantages of the Xilinx Virtex-5 FPGA] {{Webarchive|url=https://web.archive.org/web/20100726040646/http://zone.ni.com/devzone/cda/tut/p/id/7440#toc1 |date=2010-07-26 }}." June 17, 2009. Retrieved June 29, 2010.</ref>

Legacy Virtex devices (Virtex, Virtex-II, Virtex-II Pro, Virtex 4) are still available, but are not recommended for use in new designs.